Akos Hadnagy

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September 2018

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WARP-V is an implementation of the RISC-V ISA that showcases the powerful modeling techniques provided by Transaction-Level Verilog.

WARP-V: The Most Flexible RISC-V CPU Core Generator

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Artix®-7 35T "Arty" FPGA Evaluation Kit

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Parallella FPGA Hacker Board

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Parallella FPGA Microserver

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