alainstas
Published © GPL3+

For a few simulations more Part 5 - NTC and optocoupler

An LTspice simulation of a temperature control thermostat with NTC thermistor and optocoupler

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For a few simulations more Part 5 - NTC and optocoupler

Things used in this project

Hardware components

Vishay 6N137
×1
NTC Through hole thermistor 10 Kohms
Vishay NTC Through hole thermistor 10 Kohms
×1
Analog Devices OP77
×1
Vishay SUM75N06-09L
×1

Story

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Schematics

Thermostat with optocoupler and thermistor

unzip and open it LTspice XVII

Code

LTspice netlist for Vishay optocouplers

Plain text
use it to simulate 6n137 in LTspice
************************************************
**  enable- high, NMOS output
**  --  6N137,VO2601/2611, VO0600/0601/0611 ---
************************************************
** test conditions:VCC=5V, RL=350, CL=15pF, IF=10mA
** characteristics: VF=1.4V, ITH=5mA, VEH=2V, VEL=0.8V
** VOL=0.6V, tpLH=TpHL=70nS, tr=22nS, tf=17nS
**
** Model Node - Symbol - Pin
** 1 (DA)       A         2
** 2 (DK)       K         3
** 3 (GND)    GND         5
** 4 (VO)      VO         6
** 5 (VE)      VE         7
** 6 (VCC)    VCC         8
**
*$
.SUBCKT 6N137  DA DK GND VO VE VCC
dD1  DA 6  DEMIT
vV1  6  DK  DC 0
wW1  VCC 7  vV1  I_SW1
rR3  GND 7  1K
xU3  7 7delay GND DELAY20n
;A1 I1 I2 0 0 0 O2 0 0 AND Vhigh=5
XU2  7delay VE 8 VCC GND AND2
rR4  8  9 5K
rR5  VCC VE 100K
MQ1 VO 9 GND GND MOST1 W=9.7M L=2U  ;NMOS OUTPUT
.MODEL    DEMIT   D
+IS=1.69341E-12 RS=2.5 N=2.4  XTI=4
+EG=1.52436 CJO=1.80001E-11 VJ=0.75 M=0.5 FC=0.5
.MODEL MOST1 NMOS (LEVEL=3 KP=25U VTO=2 RD=45)
.MODEL I_SW1 ISWITCH (Roff=1e6 Ron=1 IT=4.9m IH=0.1m)
.ENDS
*$

***-------------------------------------------------------------------------
* 2 INPUT AND GATE
*
.SUBCKT AND2 A B Y VCC GND
ETHRS   THRS GND VALUE {1.5} ; Logic level threshold
EGATE   YINT GND VALUE {IF(V(A) > V(THRS) & V(B) > V(THRS), V(Vcc), V(GND))}
RINT YINT Y 1
CINT Y 0 10p
.ENDS

***------------------------
* DELAY
*
.SUBCKT DELAY20n IN OUT GND
E IN2 GND VALUE {V(IN)}
Rdelay IN2 OUT 10k
Cdelay OUT GND 2p
.ENDS

Credits

alainstas
67 projects • 35 followers
product marketing engineer at Vishay. began to simulate in spice programs in 2014.

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