Wiznet Ethernet Chip Design Guide

Introduction

I have summarized the points to pay attention to while designing the Ethernet chip circuit. It was based on Wiznet's chip. Please use it as a reference only.

Index

• Design Check List
• SCH Design Guide
• PCB Design Guide

Design Check List

This is a Check Menual that allows you to simply check before finding the exact reason for the error.

DRC Check

When designing a circuit, set design rules and see if there are any parts that deviate from those rules. That is, it is a function that can check whether there is a fatal error. Each design tool is slightly different, but check if there is a DRC error.

Decoupling Capacitor

Applies to all chip designs. Decoupling Capacitor is to remove noise from power line. As the purpose of filtering is to place it as close as possible to the corresponding chip, which is the end of the line. Usually, from the main power supply, large caps are placed in the order of small caps. In other words, it is better to place the smallest cap on the chip. However, for some chips, it is recommended to check the datasheet as there are cases where a large cap is placed near the main chip.

Oscillator

It is recommended to place the oscillator as close to the chip as possible.

Because it is a very high-frequency clock, it is recommended to draw a line with the same layer as the chip without vias.

It is recommended to design the line as simple and short as possible.

Also, it is absolutely impossible to connect two devices to one oscillator. (Insufficient current, mutual interference issue)

GND Plane

Power Line should also consider Pattern and Via settings. In the pattern, the current capacity changes according to the width, thickness of copper foil (Hight: OZ), and temperature.

Current capacity varies depending on Via, so it is recommended to design with this in mind. It is better to design with several smaller vias rather than one large via.

Schematics Design Guide

The circuit types are divided into the following categories.

• W6100, W5100S, W5300
• W5500
• W7500P
• W7500

W6100, W5100S, W5300 schematic design

• If you use RJ45 Connector that does not include Trans, you must design the Trans part as well.
• Option 1 is a damping resistor for EMI protection. In our case, 33Ω is often used.

W5500 schematic design

• If you use RJ45 Connector that does not include Trans, you must design the Trans part as well.
• Option 1 is a damping resistor for EMI protection. In our case, 33Ω is often used.

****** W5500 internal Rx, Tx PHY is driven in different modes. Therefore, the design for TCT/RCT is changed.

Let's look at the circuit below

A general PHY chip has the same UTP port level as Rx and Tx. PHY has two modes, Voltage Mode and Current Mode, and it is determined according to the UTP port level stored in the PHY Chip data.

W5500 has different Rx and Tx port levels unlike regular chips. Rx side is driven in Current Mode and Tx side is driven in Voltage Mode.

In Current Mode, the CT should be connected to GND through the capacitor, and in Voltage Mode, the power should be connected to the CT.

If you look at the Ethernet socket above, the RCT and TCT are tied together. Therefore, if voltage is applied to the current mode RCT, it is necessary to insulate the Rx and Tx lines with appropriate capacitors to prevent bypass.

In other words, only when the circuit is configured with RJ-45 Socket where W5500, TCT, and RCT are bundled, you only need to install a Capacitor on the Rx Line.

W7500P schematic design

• If you use RJ45 Connector that does not include Trans, you must design the Trans part as well.
• Option 1 is a damping resistor for EMI protection. In our case, 33Ω is often used.

W7500 Schematic design

• The PHY Chip must be additionally designed, and for the design part, refer to the PHY Chip manufacturer's Doc.

[Additional] Circuit when transformer is separated from RJ-45(If RJ-45 Socket with transformer is used, applicable X )

• Parts A and B should be placed as close to the transformer stage as possible.
• The distance between the transformer and RJ-45 socket should be as close as possible.
• It is recommended that the distance be less than 25mm (1000mil).

PCB Design Guide

Ethernet Socket part

Socket is divided into Socket combined with Trans and Socket separated. It is classified into these two categories, but please note that the circuit may be slightly different depending on the transformer design. In general, Socket combined with Trans is used a lot.

• Like the above PCB, it is good to insulate without putting Power and GND Plane in the layer below the Ethernet Socket.
• If the design is separated from the Trans, the Trans also insulates without putting Power and GND Plane in the lower layer.

MDI Digital Line

• The shorter the TX and RX lines, the better.
• For shielding, it is good to make a GND plane between the TX and RX pairs.
• There should be no routing for digital signals between the PHY and RJ45 connectors.
• There should be no high-frequency devices and lines near the TX and RX signals.
• It is good to adjust the length of TX and RX lines as much as possible.
• The individual impedances of the TX+/- and RX+/- signals should be kept below 50 ohms, and the impedances of the +/- differential signals should be kept at 100 ohms.
• The recommended signal length is less than 25mm (1000mil), no matter how long it should be no longer than 75mm (3000mil).
• Routing of TX+/- and RX+/- should be connected at a 45 degree or curved line.
• TX+/- and RX+/- signals are not good for Via or Layer changes.