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While using FPGAs in certain projects might be the best choice, the fact that FPGA designs have to be written in VHDL, or Verilog, might discourage new users. However, by using the PLD design function of Multisim Desktop Education and the compiler of the Vivado Design Suite, "schematics" of digital circuits can be translated to FPGA bit files and uploaded to the chip. While Multisim contains a few selectable FPGA boards, most of them are older and were already replaced, but newer FPGA board can be easily added.
Adding an FPGA Board to MultisimMultisim needs two configuration files specific tothe chosen FPGA board. These two are an ***.xdc** and a ***.mspc** file. The xdc file is called a constraints file (standing for Xilinx Design Constraints) and contains the location constraints assigning physical FPGA chip pins to port names in HDL code. You can also think of this file like the name definitions for physical pins, so later, in your "code" you only have to use the name, not the pin number. For more information on constraints files, read: What is a Constraints File.
For Digilent boards, you can find the xdc file specific to your board on the bottom right hand side of the board's resource center, or on this page. Download the file for your board.
Open the downloaded constraints file in a text editor, then create an empty file with the same base name and the *.mspc extension (replacing the ".xdc"). This file will contain the available pins in Multisim PLD design.
First, create the header and the “body” of the file. The language is similar to HTML, and is easily readable. For the file to be compatible with your board, you will have to change the Name, PartNumber, BoardName, Family, Device, Package, and Ucf fields. You can leave the other fields as they are.
<PLDConfiguration Version="1.0">
<Component Name="Digilent Arty S7-50" PartNumber="XC7S50" Version="1.0" OpVoltageInput="3.3" OpVoltageOutput="3.3" OpVoltageBidirectional="3.3" BoardId="">
<DeviceList BoardName="Digilent Arty S7-50">
<XilinxDevice Manufacturer="Xilinx" Family="Spartan-7" Device="XC7S50" Package="CSGA324" Speed="-1" DeviceOffset="1" DeviceId="" Ucf="Arty-S7-50-Master.xdc" />
</DeviceList>
<ProgrammingProperties>
<Interface CableTarget="digilent_plugin"/>
</ProgrammingProperties>
<Pins Locked="1">
</Pins>
</Component>
</PLDConfiguration>The Name and BoardName fields contain the name of the board. This is how the board will appear in Multisim. The PartNumber and Device fields contain the name of the FPGA chip. This usually can be found in the board's Reference Manual, or you can find it by plugging in the board and starting Adept.
The Family of the FPGA chip appears in the board's Reference Manual. In this case, a Spartan-7 FPGA is used. The Ucf field contains the name of the xdc file. The trickiest property is the Package. You can check the Reference Manual for information about the package of the chip, or take a look on the chip itself or the sticker placed on the chip (the sticker might contain other information as well).
In the constraints file, uncomment the lines describing the resources you want to use by deleting the "#" mark at the beginning of each of the lines. Also change the name of these pins to names you can easily remember (the names shouldn't contain special characters). You can uncomment every resource, as long as there aren't any conflicts: shared pins for multiple resources, like ADC and digital I/O - conflicts are mentioned in the xdc file, in comments.
The final step is to add the pins to Multisim, which can be done by adding the line below to the mspc file, for every pin.
<Pin Name="pin_name" Mode="pin_mode" Location="pin_location" Place="pin_placed" />In the code snippet, pin_name marks the name of the pin (which was set in the xdc file), pin_mode marks the mode in which the pin will be used (it can have the values “in”, “out”, or “bidir”), pin_location can be “right”, or “left”, depending on which part of the sheet you want to place the pin on (they can be moved freely later) and pin_placed marks if the pin is selected by default, or not (can have the values “1”, or “0”).
To make your configuration files available for Multisim, copy both files to the pldconfig directory of Multisim. The default path of the directory is: “C:\Program Files (x86)\National Instruments\Circuit Design Suite 14.2\pldconfig”.
Open Multisim, start a new PLD design (File -> New... -> PLD design) and select the FPGA board you created the configuration files for. After naming your project, you should be able to select the pins you want to use in your project.
Create your design with the components available in Multisim. As a first project you should create something simple, like connecting the switches to the LEDs through buffers (input and output pins can't be connected directly), to check if your board works. When the design is finished, you can choose to upload it to the board, just generate the bit file, or generate the VHDL code from the design. Click Transfer -> Export to PLD... and select the option you want. Compile the design using Vivado (even if it says "unsupported", it should work).
And that's it. From now on you can create FPGA designs without Verilog, or VHDL, just by drawing the circuit.
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