/* Project Description:
* This project demonstrates how to buffer ADC data using DMA.
* The DMA is configured to buffer specified number of ADC samples on a switch press.
* The DMA channel is enabled on each switch press and disabled after collecting the specified number of ADC samples.
* Connect P1[2] to switch Sw1 on DVK and connect ADC input to P0[2].
* Run the debugger and Verify the output - Watch the 'ADC_sample' buffer in watch window of debugger.
***************************************************************************** */
#include <device.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
/*define for the number of samples to be transferred to memory on each switch press*/
#define NO_OF_SAMPLES 500
uint8 DMA_Chan;
uint8 DMA_TD[1];
uint8 DMA_2_Chan; /* The DMA Channel */
uint8 DMA_2_TD[1];
volatile uint8 switch_flag, DMADone_flag;
void main()
{
uint16 ADC_sample[NO_OF_SAMPLES]={0};
/* DMA Configuration for DMA */
#define DMA_BYTES_PER_BURST 2
#define DMA_REQUEST_PER_BURST 1
#define DMA_SRC_BASE (CYDEV_PERIPH_BASE)
#define DMA_DST_BASE (CYDEV_SRAM_BASE)
#define DMA_2_BYTES_PER_BURST 2
#define DMA_2_REQUEST_PER_BURST 1
#define DMA_2_SRC_BASE (CYDEV_SRAM_BASE)
#define DMA_2_DST_BASE (CYDEV_PERIPH_BASE)
CYGlobalIntEnable;
ISR_Switch_Start();
ISR_DMA_Done_Start();
VDAC8_Start();
DMA_Chan = DMA_DmaInitialize(DMA_BYTES_PER_BURST, DMA_REQUEST_PER_BURST,
HI16(DMA_SRC_BASE), HI16(DMA_DST_BASE));
DMA_TD[0] = CyDmaTdAllocate();
#if (defined(__C51__))
CyDmaTdSetConfiguration(DMA_TD[0], (2 * NO_OF_SAMPLES), DMA_TD[0],
TD_SWAP_EN | DMA__TD_TERMOUT_EN | TD_INC_DST_ADR);
#else
CyDmaTdSetConfiguration(DMA_TD[0], (2 * NO_OF_SAMPLES), DMA_TD[0],
DMA__TD_TERMOUT_EN | TD_INC_DST_ADR);
#endif
CyDmaTdSetAddress(DMA_TD[0], LO16((uint32)ADC_DelSig_DEC_SAMP_PTR),
LO16((uint32)ADC_sample));
CyDmaChSetInitialTd(DMA_Chan, DMA_TD[0]);
ADC_DelSig_Start();
ADC_DelSig_IRQ_Disable();
ADC_DelSig_StartConvert();
for(;;)
{
if(switch_flag)
{
CyDmaChEnable(DMA_Chan, 1);
switch_flag = 0;
}
else {
DMA_2_Chan = DMA_2_DmaInitialize(DMA_BYTES_PER_BURST, DMA_REQUEST_PER_BURST, HI16(DMA_2_SRC_BASE), HI16(DMA_2_DST_BASE) );
DMA_2_TD[0] = CyDmaTdAllocate();
CyDmaTdSetConfiguration(DMA_2_TD[0], (2 * NO_OF_SAMPLES), DMA_2_TD[0], TD_INC_SRC_ADR);
/* Configure the DMA_TD[0] for address
* Source address = Lower 16 bits of adc_samples in sram
* Destination address = Lower 16 bits of VDAC8_Data_PTR register */
CyDmaTdSetAddress(DMA_2_TD[0], LO16((uint32)ADC_sample), LO16((uint32)VDAC8_Data_PTR) );
CyDmaChSetInitialTd(DMA_2_Chan, DMA_TD[0]);
CyDmaChEnable(DMA_2_Chan, 1);
}
if(DMADone_flag)
{
CyDmaChDisable(DMA_Chan);
DMADone_flag = 0;
}
}
}
/* [] END OF FILE */
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