A Beginner's Guide to FPGAs - Part 3

Introduction

This is Part 3 in my series of projects called A Beginner's Guide to FPGAs. Part 1 showed you how to set up the Alchitry Au board and Alchitry Labs software. Then in Part 2, we built a simple ALU (arithmetic logic unit), which demonstrated the elegance and power of HDLs (hardware description languages).

Now in Part 3, we will get the 7 segment display on the Alchitry IO board working, and we will take a binary input from the dip switches, convert it to BCD (binary coded decimal) and then show the number in decimal on the 4 digit 7 segment display.

The 4 Digit, 7 Segment Display

We are going to build a new project called "dip_to_7_segment". By now, you probably know how to create a new project and connect things up between modules, so we will dispense with some of the details. However, the entire project is contained in the zip file of code for this tutorial.

For this project, we are going to input a binary number through the first two banks of dip switches, and then display that number in 4 digits of BCD on the display. We have several different modules we need to make this plan work. There is, of course, our au_top module. And a module called multi_seg that actually displays numbers on the 7 segment display.

But there are actually 3 additional support modules that we need to briefly discuss:

1. decoder.luc - this is a Component or library module. It changes the digit select number into a 1 hot output. We input a number 0-3 and it selects one of 4 outputs as high, based on the input. We use this to select and light one digit of our 7 segment display. The 4 digits are multiplexed, so that only one is on at a time, but we switch between them so fast that they all appear to be on all the time.

2. multx.luc - this is a simple multiplexer which takes an input of 0 - 9 and converts it to the 7 segment representation of that number.

3. bin2bcd.v - this is a Verilog library module I found on the web that takes a 14 bit binary number and converts it into 16 bits of BCD, exactly what we need for our 4 digit, 7 segment display. Alchitry Labs seems fine with mixing Verilog code in with Lucid.

So now let's see how the multi-seg module works. Our first counter (ctr) reaches its max value every 10 msec. and increments our second counter (ctr2). The 2 bit ctr2 counts 0 to 3 and repeats. It's output goes into the decoder and produces 4 select output to drive each of our 4 digits. Ctr2's output is also used to select the part of bin2bcd's output that goes to a particular digit.

Finally, let's look at au_top, where everything comes together. We create instances of modules multi_seg and multx. We get an input number from the first two banks of dip switches. We send the input number to the 7 segment display. We link the outputs of multi_seg to the actual 7 segment display, io_sel and io_seg. Finally, because the input from the dip switches can exceed the max 9999 output of our display, we light the middle bank of LEDs on the io board if that happens - an overflow warning signal!

In the image above, you can see the dip switches that are selected:

NOTE: You might have noticed in au_top that just before we turned on the 7 segment display, we turned it off. Vivado treats later statements as replacing previous ones, so its fine to turn everything off, before turning some things on. They are not happening in time sequentially. The second statement simply replaces the first one in how the hardware is wired. This is a concept where HDLs are very different than programming languages!

What's Next

This may be a good time tell you where all this is going. In an upcoming Part 4, I will interface a 16 key keypad to the Alchitry Au board and create hardware to input numbers from it. Then in the final Part 5, we will construct a very simple decimal calculator with inputs from the keypad and output on the seven segment display.