A Beginner's Guide to FPGAs - Part 5

Introduction

This is Part 5 in my series of projects called A Beginner's Guide to FPGAs. Part 1 showed you how to set up the Alchitry Au board and Alchitry Labs software. In Part 2, we built a simple ALU (arithmetic logic unit), which demonstrated the elegance and power of HDLs (hardware description languages). In Part 3, we input numbers in binary with the dip switches and display them in decimal on a 4 digit 7-segment display. Then in Part 4, we added a keypad and set it up to input numbers and put them on the 7 segment display.

So now in Part 5, we are going to build a primitive calculator. It just does integer arithmetic. No negative numbers, so the first number entered for subtraction has to be larger than the second. And definitely no floating point math! But it does add, subtract, multiply, and divide, and it puts the answer on our 4 digit 7 segment display.

The Calculator Project

The calculator is the project integerCalculator. You can find all the files for the entire project in the attached zip file. Our calculator makes use of all the pieces presented in Parts 1, 2, 3, and 4. But there are two new modules. We will discuss each briefly.

The ALU

The first new module is a new modified version of our ALU module from Part 2.

We only have the 4 math functions add, subtract, multiply, and divide. So we have removed the others in our original ALU. Our output from this module is the 16 bit number regOut, which exceeds the 14 bits needed for 9999, which is the maximum output of our 4 digit display. But we want to detect any answer that is out of range, i.e. negative or greater than 9999 and flag them. Since two 16 bit number could be multiplied, they might yield an answer up to 32 bits. So we need to look at a 32 bit result to detect overflow. This approach also catches and flags any negative result (as it shows up in result as 2's compliment).

The Sequencer

The other new module is called calc. It is the sequencer which captures the first input number, then the requested operation, then the second input number and finally the equals button which says the second number is finished and we can display the result. Here is a potion of the calc module:

I will try to summarize how it works. With stepper at 0, a number entered is latched into regA. When +, -, *, or / is keyed, the stepper moves to 1 and the appropriate opcode is latched in. With the stepper now at 1, a number entered is latched into regB. And when = is keyed, stepper goes to 2, which tells module au_top to display the regOut answer from our ALU. Finally, the CLR key causes a reset, which clears the display and sets stepper back to 0.

The Finished Calculator

Discussing the ALU above, I mentioned the error flag. When it is set, the au_top module lights up all 24 LEDs on the io board, telling the user that the answer was out of range for our limited 4 digit, positive number display.

Now let's take a look at our final result. Here is a video of our calculator:

125 + 50 = 175

200 - 45 = 155

12 * 45 = 540

582 ÷ 16 = 36

Final Thoughts

I want to reiterate that we have built our whole calculator out of hardware - just the keypad, the 7 segment display, and a bunch of logic gates. Of course, it would have been easy to built this privative calculator with a microcontroller, but we were able to do it without one!

So the calculator concludes our series. The series as a whole summarizes my own experience as a beginner at working with FPGAs, and I hope it may be of help to someone else who is just getting started.

I am planning to do additional projects with FPGAs, but we won't call it "A Beginner's Guide to FPGAs" any longer. Next I am going to explore PWM (pulse width modulation) and control of RGB multicolor LEDs.

As I said back in part 1, I may switch at some point from Lucid to Verilog. I'm in no rush to do that. Lucid is just a variation of Verilog that eliminates some unnecessary, verbose syntax. It readily converts to Verilog and vice versa. (By the way, in the work directory of every project, Alchitry Labs has translated all your Lucid code into Verilog.)

I can see from the various tutorials on FPGAs that I still am barely getting started in learning to use FPGAs. There is so much more to learn. For example, nowhere in this series have I used any memory, other than using D flip-flops to store a single bit. This is one of many areas I need to learn more about.