A full ASIC implementation for PicoRV32
- CPU core: PicoRV32 (RISC-V – source Clifford Wolf)
- Reference design: PicoSoC
- Firmware/Software: gcc (riscv32 cross-compiler to.hex file target)
- Components: UART (“simpleuart”), SPI memory controller (“spimemio"), Scratchpad SRAM memory, SPI flash memory (up to four channels
Full-chip implementation of the PicoRV32 PicoSoC in X-Fab XH018. The raven chip contains two ADCs, a DAC, comparator, bandgap, RC oscillator, and over-temperature alarm, as well as 16 bits of general-purpose digital inputs/outputs. It is powered off of a single 3.3V supply and driven by a 5 to 12 MHz crystal. The core CPU clock speed is 8 times the crystal frequency.
Features- 100 MHz clock rate
- Selectable clock source
- 16 channels GPIO
- 2 ADCs
- 1 DAC
- 1 Comparator
- Over-temperature alarm
- 100 kHz RC oscillator
- Selectable functions on GPIO outputs
- Selectable interrupts on GPIO inputs
- Synthesis: yosys / ABC
- Static Timing Analysis: vesta
- Placement: graywolf
- Routing: qrouter
- Layout & DRC: magic
- LVS: netgen
- Verilog simulation: iverilog
- Cosimulation: ngspice and iverilog
- Mask generation: magic
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Chip designer for Analog Devices
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