Hackster is hosting Hackster Holidays, Ep. 6: Livestream & Giveaway Drawing. Watch previous episodes or stream live on Monday!Stream Hackster Holidays, Ep. 6 on Monday!
Karl de Boois
Published © GPL3+

Binary Neural Network Demonstration on Ultra96

FPGA-based Binary Neural Network acceleration used for Image Classification on the Avnet Ultra96 based on the Xilinx Zynq UltraScale+ MPSoC.

BeginnerProtip1 hour6,700
Binary Neural Network Demonstration on Ultra96

Things used in this project

Hardware components

Ultra96-V1
Avnet Ultra96-V1
×1
MicroSD Module (Generic)
×1
Avnet Ultra96 Power Supply - 12V 2A
×1
Logitech C920 Webcam
×1
Mini DisplayPort to DisplayPort adapter
×1
Asus PB278 Monitor
×1
Zynq MMP
Avnet Zynq MMP
×1

Story

Read more

Schematics

Demo Set-up

Overview diagram

Code

Xilinx BNN source code for PYNQ

The BNN source code for PYNQ that is used in this project.

Credits

Karl de Boois

Karl de Boois

2 projects • 16 followers
FPGA Expert with SBC addiction

Comments