Erich Styger Demonstrates How to Drop a Microcontroller's Power Draw by Orders of Magnitude

Embedded engineer and professor Erich Styger has demonstrated exactly what you need to consider when optimizing an embedded project for power consumption — walking through features that drop a simple Arm Cortex-M0+ project from 2,390nWh to just 70nWh per cycle.

"At the Lucerne University of Applied Sciences and Arts I'm teaching the topic of low power optimizations in a lecture and course with labs. I have been asked if I could share and publish parts of it on my blog," Styger explains of his latest article. "That way you could use it for your learning or exploring ways how to optimize an MCU [Microcontroller Unit] application for low power. Optimizing systems for deep low power or deep low energy is a challenging task. Nonetheless […] it is possible to reduce energy consumption by a factor of 100 or more."

Styger's demonstration takes place on an NXP LPC804 microcontroller, featuring an Arm Cortex-M0+ microcontroller core running at 15MHz with 4kB of static RAM (SRAM) and 32kB of flash memory, programmed using the NXP MCUXpresso IDE via an MCU-Link Pro — providing both programming and debugging capabilities alongside easy energy measurements.

"As a main rule: to have a low power design, then this has to be applied from the very first beginning," Styger explains. "[This] means it has to be part of the hardware design and software design. Applying low power at the end won’t give great results. Still it is possible to reduce energy and power consumption for an existing design, although probably with limited results."

To prove it, Styger developed a simple application — turn on an LED, perform a few sorts to simulate functional work, and turn the LED off again — and measured its energy usage without optimization: 2,390nWh. By making the program execute from RAM rather than flash, this was lowered to 1,470nWh while also improving its performance. Switching to 1.8V operation from 3.3V lowered things still further, to 1,282nWh, while dropping the microcontroller's clock speed from 15MHz to just 1MHz drops it to 726nWh.

An interesting optimization follows, to bring the power draw down to just 403nWh: moving away from a bare-metal implementation of the project to one running atop the FreeRTOS real-time operating system to take advantage of its timing and sleep capabilities. Reducing the operating system's tick frequency drops the power draw again, to 307nWh, while configuring it for tickless idle results in an even better 288nWh.

Code optimizations follow, lowering the draw to 211nWh — dropped further to 162nWh using the microcontroller's low-power wakeup timer. Enabling deep sleep lowers the draw to 115nWh, before Styger's final optimization: telling the microcontroller to enter power-down mode, rather than sleep, and clocking the chip back up to 15MHz to complete the work faster, hitting an impressive 10nWh — more than two hundred times less than the original implementation's power requirement.

The full write-up, including source code, is available on Styger's blog.