Lattice Launches Avant FPGA Platform, Avant-E Parts for Mid-Range FPGA Edge Processing Tasks
Featuring up to 7,200 8×8 DSPs for on-device machine learning workloads, this mid-range FPGAs promise big gains over the competition.
Lattice Semiconductor has announced a new field-programmable gate array (FPGA) platform, Avant, with which it's targeting the mid-range market — promising best-in-class power efficiency and advanced connectivity.
"With Lattice Avant, we extend our low power leadership position in the FPGA industry and are poised to continue our rapid pace of innovation, while also doubling the addressable market for our product portfolio," says Lattice president and chief executive Jim Anderson. "We created Avant to address our customers’ need for compelling mid-range FPGA solutions, and we’re excited to help them accelerate their designs with new levels of power efficiency and performance."
The launch comes with some extremely bold claims from Lattice, including: a 2.5x improvement in power draw over "similar class competitive devices"; a doubling in performance against the same unnamed competitors; an impressive sixfold drop in package size; and advanced connectivity including SERDES support configurable up to 25Gbps, PCI Express Gen. 4, and LPDDR4 and DDR5 dynamic RAM (DRAM).
"We are proud to build on our history of power efficient innovation with the introduction of Lattice Avant by delivering breakthrough architectural advancements, features, and capabilities to address our customers' needs across an expanded set of applications," claims Lattice's Steve Douglass. "Just as we’ve done with our Nexus platform, we have a strong and steady roadmap of future product introductions based on the Avant platform. To make designing with Lattice Avant FPGAs as easy as possible, Avant will be fully supported by our robust software tools and application-specific solution stacks."
The first devices in the Avant platform will be the Avant-E chips, which target edge processing applications. These offer up to 477k logic cells, 990 36kb embedded memory blocks, 35.6Mb of embedded memory and 4,140kb distributed RAM, and 1,800 18×18 or 7,200 8×8 INT8 digital signal processing (DSP) multipliers for edge-AI workloads.
More information on the new parts is available on the Lattice website, but at the time of writing the company had not yet confirmed pricing.