Lattice Launches New "Logic-Optimized" Certus-NX FPGAs, Promises Leading Efficiency
Drawing as little as a quarter the power of rival designs, the new Certus-NX range comes in sizes from 9k to 39k logic cells.
Lattice Semiconductor has announced new models in its compact low-power field-programmable gate array (FPGA) line-up, unveiling "logic-optimized" Certus-NX parts including the Certus-NX-28 and Certus-NX-09.
"Lattice is committed to delivering continued innovation in small, low power FPGAs to empower our customers with optimized solutions for space-constrained applications ranging from sensor interfacing to co-processing to low power AI [Artificial Intelligence]," claims Lattice's Dan Mansur of the company's latest launch. "We're excited to expand our Nexus-based small FPGA offerings by adding more migratable logic and package options including 0.8 mm pitch, ideal for industrial applications."
Built atop the company's Nexus platform, the new Certus-NX chips are claimed to deliver up to a fourfold reduction in power draw over rival devices, up to a threefold reduction in footprint, up to double the input/output per square millimeter, and the "smallest PCIe [PCI Express] and gigabit Ethernet implementation," which is available in parts measuring as little as 36mm².
The company also promises that the "logic-optimized" FPGAs deliver up to a hundred times lower soft-error rate than offerings from its rivals, making them ideal for safety-critical applications.
Exact specifications vary by part, with the entry-level Certus-NX-09 offering 9k logic cells, 270kb of embedded memory, 1,536kb of large memory, and 12 18×18 multipliers, while the top-end Certus-NX-40 has 39k logic cells, 1,512kb of embedded memory, 1,024kb of large memory, 56 multipliers, and on-board PCI Express Gen. 2 hard IP.
More information on the new line-up is available on the Lattice website.