Open Source SoC: The NEORV32 Processor

FPGAs are a powerful tool due to their flexibility in reprogramming / configurability and parallel processing power, but the need for a base CPU structure within them still remains. This is typically due to operational requirements such as complex mathematical calculations that can be extremely complex to implement in HDL (hardware definition language) on hardware and are easier done in a higher level language such as C on a central processing unit.

This is where the concept of soft processors comes in. Soft processors are CPU architectures implemented directly onto the hardware by means such as HDL (Verilog/VHDL). And it this unique union of software and hardware that sparked the inspiration of Stephan Nolting to develop an open source, RISC-V-compatible processor system: the NEORV32.

The NEORV32 is a soft processor that has the power to be used as a standalone processor in a design or integrated into a SoC (System on Chip) as an auxiliary processor. It is highly configurable due to the fact that its fully written in VHDL and adding/removing peripherals is just a matter of instantiating the right VHDL module. Available peripherals include: UART, SPI, GPIO, PWM, TWI, interrupt controller, embedded memory, timers, and an external bus interface to connect custom IP. It also contains on-line and in-system debugging supported by an OpenOCD/gdb-compatible on-chip debugger accessible via JTAG.

This extreme flexibility of configuration in this soft processor most certainly makes up for the main downfall of soft processors in general: they can't compete with the performance benchmarks of their physical instantiated counterparts. The NEORV32's flexibility of configuration allows for it to fit into lower power requirement designs, and users can define their own instruction sets when needed.

The NEORV32 is unique because it's not simply based on another RISC-V core, it's actually built completely from the ground up via a hierarchy of VHDL modules following official ISA specifications. This behavioral, platform-independent VHDL implementation also makes the NEORV32 processor platform-independent. Take a look at the screenshot below to see what the NEORV32 looks like:

The open source NEORV32 is well documented with an extensive description on its GitHub written by Nolting. A software framework is also provided with various software libraries, application Makefiles, a bootloader, some example programs, and even a runtime environment. The RISC-V GCC is used as default toolchain, but some other prebuilt toolchains are also provided in the project's repo.

The thoroughness of both the actual hardware and software implementation of the NEORV32 processor, along with the detailed documentation is incredible! Definitely worth a look for your next project!