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Pawel Jablonsk's XiPU_v2 Is a MOS 6502-Inspired Discrete Logic Processor and Personal Computer

Built from 7400-series chips and a couple of EEPROMs, this retro-themed computer is open source.

Gareth Halfacree
4 months ago β€’ Retro Tech / HW101

Vintage computing enthusiast Pawel Jablonski has released a second-generation version of XiPU, an ongoing effort to build a custom processor using discrete 7400-series logic β€” inspired by, and loosely based on, the famous MOS Technology 6502 microprocessor.

"The second version of the XiPU has extended instruction set, new flat memory structure, advanced stack and function frame operations support," Jablonski explains of the upgraded version of the processor. "All [the] changes speed up the XiPU_v2 and add more flexibility in creating software for it. The base clock of the XiPU_v2 is still 1MHz, but the software execution speeds up because the code doing the same thing can be shorter."

The original XiPU, the XiRX Processor Unit, was inspired by the MOS Technology 6502 β€” a popular eight-bit processor, which found a home in devices from classic Apple computers to the Commodore 64/128 family. It had a 1MHz clock speed, 32kB of ROM and 64kB of RAM split into a lower 32kB for temporary data and a higher 32kB treated as additional ROM. The processor has four registers, three internal buses, and an eight-bit external data bus.

So far, so standard: but the XiPU isn't a single-chip microprocessor, it's a chunky board filled with discrete 7400-series logic chips. Despite this, it proved fully-functional β€” albeit considerably simplified over the MOS device that inspired it β€” and served as the heart of a homebrew computer dubbed the XiRX Personal Computer or XiPC.

The second-generation design sticks with 7400-series logic chips, but offers a range of improvements: a full 58kB of the now-flat 64kB RAM space is now available for application or operating system use, there are two new "hidden" stack registers and the stack has grown from 256 bytes to 4kB, some arithmetic operations can be carried out on 16-bit numbers, and architectural changes mean a significant reduction in complication for pointer calculations.

More information is available on Hackaday.io, while full details on the XiPU_v2 are available on Jablonski's website; design files and source code have been published on a Git repository under a custom license.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire: freelance@halfacree.co.uk.
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