The Nyan Keys Low-Latency Keyboard Breaks the Sound Barrier with an FPGA and "Overkill" MCU

Pseudonymous maker "Portland.HODL" has created a mechanical keyboard designed for the absolute lowest possible input latency — by using a field-programmable gate array (FPGA) and "overkill" microcontroller.

"The purpose of Nyan Keys was to engineer the lowest possible latency mechanical keyboard that would accept any Cherry compatible switches, e.g. Kailh and Gateron," Portland.HODL explains of the keyboard's design. "The hardware inspiration came from the Wooting 60HE and Pok3r 60% mechanical keyboards. Where the performance characteristics of the Wooting were desired but with the freedom to use any off the shelf switches of the Pok3r."

In a typical mechanical keyboard design, a single relatively low-resource microcontroller is used as an interface between the physical switches and the USB host. There's a microcontroller in the Nyan Keys keyboard — named for the famous Nyan Cat animation — but it's rather more powerful than you'd expect: an STMicro STM32F723, offering USB 2.0 high-speed connectivity for polling rates up to 8,000Hz.

That might be enough for some, but Portland.HODL wasn't yet satisfied — so the keyboard includes a Lattice Semi iCE40HX 4k FPGA. "Using an FPGA had the advantage of being able to wire each switch to its own IO pin [and] to give each key (switch) its own core, which consists of an eight-bit timer. The timer is always counting up to the value of 255, once the counter reaches the comparison value the key can change its state and the timer will reset to 0. While the counter is any value that is not 255 the switch state can not be changed. This is the debounce mechanism."

With a dedicated core per key, plus the high-performance microcontroller, Nyan Keys delivers the absolute lowest latency between keypress and action — but there's plenty of resources left in the FPGA for more. As a result, Portland.HODL added a particularly unusual feature for a keyboard: a real-time operating system (RTOS) dubbed NyanOS which includes an FPGA-accelerated Bitcoin miner — a likely-divisive feature which, the maker says, is optional and off-by-default.

"[The] Nyan GUI [Graphical User Interface] also has a JavaScript based instance of a Xterm terminal that enables the user to start inputting their own commands to hack the cat," Portland.HODL adds. "A few features I have right now are getting performance stats, setting the owner's name, getting build info, writing a bitstream, and help."

Full details on the project are available on Hackaday.io, while Portland.HODL has released hardware and software sources on GitHub under the permissive MIT license and Apache 2.0 license respectively; there is, however, no board file.

"I want to sell the boards that [I] designed and don't want other commercial entities with a low barrier to entry do the same," the maker explains — while saying interested parties can send an email expressing interest in a .BRD file for personal use.