VHDL implementation of random number generator from 0 to 15 (4 bits). The random number is displayed on LED vector display on FPGA. Implemented on Xilinx Spartan 6 FPGA.
Press push button on FPGA to generate 4 bit random number. It can show anything from (0000 to 1111).
Random number generation is done by continuous XOR operation of bit vector at clock pulses.
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Embedded Systems
Microcontrollers
Microprocessors
VLSI Designer
FPGA Designer
IOT
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