PYNQ-Z2 HDMI Usage - 3: Using Sobel Filter with HDMI

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/*
 * helloworld.c: simple test application
 *
 * This application configures UART 16550 to baud rate 9600.
 * PS7 UART (Zynq) is not initialized by this application, since
 * bootrom/bsp configures it to baud rate 115200
 *
 * ------------------------------------------------
 * | UART TYPE   BAUD RATE                        |
 * ------------------------------------------------
 *   uartns550   9600
 *   uartlite    Configurable only in HW design
 *   ps7_uart    115200 (configured by bootrom/bsp)
 */

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"

#include "xv_tpg.h"
#include "xvidc.h"

#include "xhls_sobel_axi_stream_top.h"

XV_tpg Tpg;
XV_tpg_Config *Tpg_ConfigPtr;

XHls_sobel_axi_stream_top example_ptr;

#define TPG_Format	XTPG_BKGND_COLOR_BARS

void XV_ConfigTpg() {


	u32 width, height;

	width = 1920;
	height = 1080;


	/* Stop TPG */
	XV_tpg_DisableAutoRestart(&Tpg);

	XV_tpg_Set_height(&Tpg, height);
	XV_tpg_Set_width(&Tpg, width);
	XV_tpg_Set_colorFormat(&Tpg, XVIDC_CSF_RGB);
	XV_tpg_Set_bckgndId(&Tpg, TPG_Format);
	XV_tpg_Set_ovrlayId(&Tpg, 0);


	/*
	 * Enable/Disable pass through mode based on whether sensor
	 * or TPG is selected
	 */

	XV_tpg_Set_enableInput(&Tpg, 1);


	XV_tpg_Set_passthruStartX(&Tpg, 0);
	XV_tpg_Set_passthruStartY(&Tpg, 0);
	XV_tpg_Set_passthruEndX(&Tpg, width);
	XV_tpg_Set_passthruEndY(&Tpg, height);

	/* Start TPG */
	XV_tpg_EnableAutoRestart(&Tpg);
	XV_tpg_Start(&Tpg);
}


void ResetVDMA()
{

	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x00, 0x00000004);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x30, 0x00000004);

}

void RunVDMAwithRegister(){

/////////////////////////// VDMA 0 /////////////////////////
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x30, 0x8B);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0xAC, XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x0000000);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0xB0, XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x2000000);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0xB4, XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x4000000);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0xA8, 1920*3);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0xA4, 1920*3);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0xA0, 1080);


	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x00, 0x8B);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x5C, XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x0000000);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x60, XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x2000000);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x64, XPAR_PS7_DDR_0_S_AXI_BASEADDR + 0x4000000);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x58, 1920*3);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x54, 1920*3);
	Xil_Out32(XPAR_AXI_VDMA_0_BASEADDR + 0x50, 1080);
/////////////////////////////////////////////////////////////////////////////
}


int main()
{
    init_platform();
    int Status;

    ResetVDMA();
	RunVDMAwithRegister();


	// Initialize module
	Status = XHls_sobel_axi_stream_top_Initialize(&example_ptr, XPAR_HLS_SOBEL_AXI_STREAM_0_DEVICE_ID);
	if (Status != XST_SUCCESS) {
		xil_printf("Example Initialization Failed\r\n");
		return XST_FAILURE;
	}

	XHls_sobel_axi_stream_top_Set_rows(&example_ptr, 1080);
	XHls_sobel_axi_stream_top_Set_cols(&example_ptr, 1920);




    /* Initialize TPG IP */
	Tpg_ConfigPtr = XV_tpg_LookupConfig(XPAR_V_TPG_0_DEVICE_ID);

	if (Tpg_ConfigPtr == NULL) {
		Tpg.IsReady = 0;
		return (XST_DEVICE_NOT_FOUND);
	}

	Status = XV_tpg_CfgInitialize(&Tpg, Tpg_ConfigPtr,
			Tpg_ConfigPtr->BaseAddress);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR:: TPG Initialization failed %d\r\n", Status);
		return (XST_FAILURE);
	}

	XV_ConfigTpg();

	XHls_sobel_axi_stream_top_Start(&example_ptr);
	XHls_sobel_axi_stream_top_EnableAutoRestart(&example_ptr);


    print("Successfully ran application");
    cleanup_platform();
    return 0;
}