shahbaaz lokhandwala
Published © MIT

Interface fpga with PCIe

Using XDMA PCIE with DDR MEMORY in Vivado

IntermediateProtip1 hour1,908
Interface fpga with PCIe

Things used in this project

Hardware components

Nitefury
×1
JTAG-HS2 Programming Cable
Digilent JTAG-HS2 Programming Cable
×1

Software apps and online services

xdma pcie drivers

Hand tools and fabrication machines

vivado

Story

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Code

nitefury_pcie_xdma_ddr

Credits

shahbaaz lokhandwala

shahbaaz lokhandwala

2 projects • 2 followers
FPGA Design Engineer with 7+ years of experience

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