Part 1: Basics of FPGAs
Part 2: Combinational Logic with Xilinx ISE on Spartan 6 FPGA
Part 3: Sequential Logic with Quartus Prime on Cyclone-IV FPGA
Part 4: Combinational Logic vs. Sequential Logic with Vivado on Artix-7 FPGA
Part 5: Final Project - Pong Game on DE0 Nano Development Board
Background:I am a University student and I work a lot with FPGAs and Microcontrollers for Embedded System Design and IoT. Through this blog series, I'd like to explain as much as possible about prototyping with the FPGAs.
ASIC vs. FPGA:ASIC stands for Application-Specific Integrated Circuit whereas FPGA stands for Field Programmable Gate Array.
These are from two different classes of products namely ASSPs and PLDs where ASSP stands for Application-Specific Standard Product and PLD stands for Programmable Logic Devices.
In an ASIC, the design is already specified for a particular application and is fabricated by etching the design onto the chip (Substrate) and this design cannot be changed once the ASIC is fabricated. Which means the ASIC is not re-configurable, or we can say, if there are any design updates or modification, one needs to go through the whole design process from Design entry to fabrication all again.
Take 74xxx or 4xxx digital ICs for example, they have a specific purpose, and once fabricated their functionality can't be changed. 7400 is a NAND Gate IC and once it is fabricated, it'll remain as NAND IC forever and cannot be reconfigured.
Note: Microprocessors and Microcontrollers are also ASICs as their architecture cannot be altered either. When you program a Microcontroller, you're just dumping the code into the program memory of the Microcontroller and not re-configuring its architecture in any way.
Evolution:PLDs:This is a separate class of Integrated Circuits wherein the logic function of the IC can be programmed after its fabrication.
It is the user's choice to implement any logic function into the PLDs. There are several types of PLDs, let's go through them one by one.
1. PROM, EPROM, and EEPROM:While a ROM is "Mask Programmed" meaning the memory is hard-wired and fabricated at the foundry, thus it can't be changed after fabrication.
PROM stands for Programmable Read-only Memory, this type of PLD is also called an OTP device which means its one time programmable.
When manufactured in foundries, the fuses (small lines connecting rows and columns) link all rows and columns meaning there's a logic '1' in every location.
The user can program any data into it when it's programmed, where ever there's a '0' required, the fuse is blown by sending high current (that's how a fuse works right?).
An EPROM stands for Erasable Programmable Read-Only Memory is different from PROM by the fact that EPROM can be programmed more than once (re-programmable). The memory is erased by flashing UV light on the chip (that is why you can see a glass window for UV to penetrate). Then reprogrammed using a programmer device. The images below show D2764D (8K*8 EPROM) and how the EPROM memory can be erased by flashing UV.
EEPROM stands for Electronically Erasable Programmable Read-Only Memory which is widely used nowadays in microcontrollers such as the ATmega328P present in Arduino. The EEPROM can be re-programmed electronically, using a programmer. The image below illustrates the same.
A programmable logic array (PLA) has a programmable AND gate array, which links to a programmable OR gate array, which can then be conditionally complemented to produce an output. A PLA is similar to a ROM concept, however, a PLA does not provide full decoding of a variable and does not generate all the minterms as in a ROM.
PAL devices have arrays of transistor cells arranged in a "fixed-OR, programmable-AND" plane used to implement "sum-of-products" binary logic equations for each of the outputs in terms of the inputs and either synchronous or asynchronous feedback from the outputs.
Block diagram of a PAL, Used in memory-mapped I/O and in Memory Interface Logic for 6800 Microprocessor Bus (6800 based computer) as shown in images below.
An improvement on the PAL was the generic array logic device, or GAL, invented by Lattice Semiconductor in 1985. This device has the same logical properties as the PAL but can be erased and reprogrammed. The GAL is very useful in the prototyping stage of a design when any bugs in the logic can be corrected by reprogramming. GALs are programmed and reprogrammed using a PAL programmer, or by using the in-circuit programming technique on supporting chips.
Read the datasheet of a GAL by Lattice Semi to know more: https://www.silicon-ark.co.uk/datasheets/gal16v8-datasheet-lattice.pdf
TIll now, the devices that we saw, are SPLDs (Simple Programmable Logic Devices) which contain no more than 100 gates or so. For implementing larger functions we move on to the next device called as CPLDs which are complex programmable logic devices.
5. CPLD - Complex Programmable Logic Device:PALs and GALs are available only in small sizes, equivalent to a few hundred logic gates. For bigger logic circuits, complex PLDs or CPLDs can be used. These contain the equivalent of several PALs linked by programmable interconnections, all in one integrated circuit. CPLDs can replace thousands, or even hundreds of thousands, of logic gates.
The main building block of the CPLD is a macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations. Given below is a block diagram of a CPLD.
Given above is a block diagram of a very basic FPGA.
To understand more about FPGAs lets first look at the key differences between FPGAs and CPLDs:
The main distinction between FPGA and CPLD device architectures is that FPGAs are internally based on look-up tables (LUTs) while CPLDs form the logic functions with sea-of-gates (for example, sum of products). - Wikipedia
A CPLD contains a bunch of PLD blocks whose inputs and outputs are connected together by a global interconnection matrix. So a CPLD has two levels of programmability: each PLD block can be programmed, and then the interconnections between the PLDs can be programmed.
An FPGA takes a different idea. It has a clump of simple, configurable logic blocks arranged in an array with interspersed switches that can rearrange the interconnections between the logic blocks. Each logic block is individually programmed to perform a logic function (such as AND, OR, XOR, etc.) and then the switches are programmed to connect the blocks so that the complete logic functions are implemented.
In short, an FPGA is a device with a large number of configurable logic blocks (CLB) surrounded by a programmable interconnect to implement a user-defined logic function.
Working with FPGAs:There are so many FPGAs available in the market from a variety of vendors.
Some of the FPGA vendors are Xilinx (acquired by AMD), Altera (now Intel), Lattice Semiconductor, Microsemi, Microchip, etc.
Choosing an FPGA is an important step, it can be done by looking at the CLB of an FPGA and decide accordingly for eg. if one wants to implement adders one type of CLB might render efficient use, while if one wants to implement shift registers another CLB might be efficient.
Here are slices from Xilinx Spartan 6 FPGA from the CLB user guide:
The above table illustrates the variants of Spartan-6 FPGAs, which one can choose according to the application requirements.
Internal Structure of Spartan-6 XC6SLX9 FPGA:
As we zoom more, we will be able to look at more detail in the FPGA, note that in the last image you will be able to see the placement of SLICEM, SLICEX and SLICEL in the FPGA.
References:Wikipedia, Xilinx Datasheet, and the web.
Using the Software and more about prototyping in the upcoming blogs.
Do let me know about your feedback in the comments!
Thanks for reading!
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