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*If you like this content please give me a like or a comment letting me know that I should continue updating this project.
The conceptThis is a new project using the nRF52832 BLE MCU as a very versatile development platform that will allow me to do many projects that requires a connection over Bluetooth and also can perform actions to control basic systems, as data acquisition, data display, motor control, graphical interfaces and much more.
Savage Electronics nRF52832 PRO 3D Model
This board dimension is 48x18mm with 30 castellated holes on the side, a micro USB connector for power, and programming through a USB to serial converter CP2104, two tactile switches for user interface and firmware programming, 1 user LED.
Savage Electronics nRF52832 PRO - ISO
I have made a small panel for easy fabrication, This panel dimensions are 92x66mm including the tooling rails at the sides. In this panel I want to test several things that a usually do not order in a regular PCB, such as tooling rails with tooling holes, external fiducial, Logo with EING finish at the top tooling rail, solder mask and cooper restrictions for text and logos, and castellated holes in a routing job, v-score at the edges of the board as well on the tooling rails.
I quoted this panel in many PCB Manufacturing houses and order some boards for the best price in the market that includes all the characteristics described above with PCBWay. (Even cheaper than the well-know 2 USD - 5PCS PCB Manufacturing House).
These board are now getting manufactured, the customer service has been awesome so far, as I ask to place the UL Marking on the Top Silkscreen layer in the bottom layer of this panel and received a preview of confirmation of this requirement, and received awesome feedback regarding the Vscore and Solder mask capabilities.
PCBWay sponsored Panel with 4 nRF52832 PRO Development Boards
Making this board possible required some knowledge in PCB Manufacturing that I will below describe the research and application.
Castellated Holes: Also know as castellations are plated through-holes or vias at the edge of a board cut in the middle by a router making them pads that can be soldered to another PCB and make subassemblies.
Castellastion or Mid-Holes
Fiducials: Its a cooper mark used by a imaging automated system as a reference to determine the position of a PCB. There are 3 types of fiducial: Panel fiducial, global fiducial and local fiducial, the panel fiducials are usually placed after the tolling holes at the tooling rails of the panel, global fiducials are placed at the corners of the PCB design ( 2 fiducials are more than enough for the task), and local fiducials that are now rarely used are placed at the corners of a high pitch IC.
Global Fiducial
V-Score: Also known as V-cutting its fast way to split boards by a "V" groove cut at the top and the bottom of the PCB, the most used scoring angle is 30° leaving a thin layer that it's easy to break after panel assembly.
Vscore splitting the panel to individual boards
Tooling Rails: Are the frame for the PCB array production, they provide stability and rigidity to the panel which makes easy the handle of PCB arrays for the stencil printers, pick and place machines and reflow ovens with a conveyor belt.
Tooling Rails, Tooling Holes, VScore, Panel Fiducials and Global Fiducials
I like using Autodesk Eagle to design my PCBs, I have been using Eagle for quite a while so it is easy for me to do all of this without asking Google How to...
Autodesk Eagle PCB Cadsoft
The castellated holes were achieved by intersecting the biggest plated through holes with a line in the dimension layer.
Casstelated Holes
To do this easier I decided to create a custom footprint, that I could use in order projects in which I will use this same board as a subassembly.
Custom nRF52832 PRO Footprint
Fiducial are also easy to make as only requires an SMD pad and two polygons circle-shaped in 3 different layers as shown below.
Global Fiducial - Grid 20 mil
I prefer to do the labeling and logo design in a vector-based graphic editor like Inkscape, that way I am able to set the labels in a good looking font, add text and indicators, and Logo fabrication is the best this way.
Artwork creation in Inkscape
Working in vectors allows you to easily scale, align, or modify your art without losing quality.
The PCBsThe PCBs have finally arrived, here are some photos.
nRF52832 PRO Sponsored Panel
nRF52832 PRO Panel
nRF52832 PRO Logo
Savage Electronics Logo in Gold finish
nRF52832 PRO Castellation
Savage Electronics Silkscreen Logo
nRF52832 PRO in the Vise
nRF52832 PRO
nRF52832 PRO Front view
nRF52832 PRO Back view
This is the board pinout.
nRF52832 PRO Pinout
You can find the Spanish version of this post on my website: savageelectronics.com
*If you like this content please give me a like or a comment letting me know that I should continue updating this project.
/* nRF52832 HCI/UART DFU Bootloader - From nRF5 SDK v11.0.0
* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
* Modified by: SparkFun Electronics
* LED blink indicator added and new board definition for the SparkFun
* nRF52832 Breakout Board.
*/
/**@file
*
* @defgroup ble_sdk_app_bootloader_main main.c
* @{
* @ingroup dfu_bootloader_api
* @brief Bootloader project main file.
*
* -# Receive start data packet.
* -# Based on start packet, prepare NVM area to store received data.
* -# Receive data packet.
* -# Validate data packet.
* -# Write Data packet to NVM.
* -# If not finished - Wait for next packet.
* -# Receive stop data packet.
* -# Activate Image, boot application.
*
*/
#include "nrf_drv_config.h"
#include "dfu_transport.h"
#include "bootloader.h"
#include "bootloader_util.h"
#include <stdint.h>
#include <string.h>
#include <stddef.h>
#include "nordic_common.h"
#include "nrf.h"
#include "nrf_soc.h"
#include "app_error.h"
#include "nrf_gpio.h"
#include "ble.h"
#include "nrf.h"
#include "ble_hci.h"
#include "app_scheduler.h"
#include "app_timer_appsh.h"
#include "nrf_error.h"
#include "bsp.h"
#include "softdevice_handler_appsh.h"
#include "pstorage_platform.h"
#include "nrf_mbr.h"
#include "nrf_log.h"
#include "app_simple_timer.h"
#if BUTTONS_NUMBER < 1
#error "Not enough buttons on board"
#endif
#if LEDS_NUMBER < 1
#error "Not enough LEDs on board"
#endif
#define IS_SRVC_CHANGED_CHARACT_PRESENT 1 /**< Include the service_changed characteristic. For DFU this should normally be the case. */
#define BOOTLOADER_BUTTON BSP_BUTTON_0 /**< Button used to enter SW update mode. */
#define UPDATE_IN_PROGRESS_LED BSP_LED_0 /**< Led used to indicate that DFU is active. */
#define APP_TIMER_PRESCALER 0 /**< Value of the RTC1 PRESCALER register. */
#define APP_TIMER_OP_QUEUE_SIZE 4 /**< Size of timer operation queues. */
#define SCHED_MAX_EVENT_DATA_SIZE MAX(APP_TIMER_SCHED_EVT_SIZE, 0) /**< Maximum size of scheduler events. */
#define SCHED_QUEUE_SIZE 20 /**< Maximum number of events in the scheduler queue. */
/**@brief Callback function for asserts in the SoftDevice.
*
* @details This function will be called in case of an assert in the SoftDevice.
*
* @warning This handler is an example only and does not fit a final product. You need to analyze
* how your product is supposed to react in case of Assert.
* @warning On assert from the SoftDevice, the system can only recover on reset.
*
* @param[in] line_num Line number of the failing ASSERT call.
* @param[in] file_name File name of the failing ASSERT call.
*/
void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
{
app_error_handler(0xDEADBEEF, line_num, p_file_name);
}
/**@brief Function for initialization of LEDs.
*/
static void leds_init(void)
{
nrf_gpio_range_cfg_output(LED_START, LED_STOP);
nrf_gpio_pins_set(LEDS_MASK);
}
/**@brief Function for initializing the timer handler module (app_timer).
*/
static void timers_init(void)
{
// Initialize timer module, making it use the scheduler.
APP_TIMER_APPSH_INIT(APP_TIMER_PRESCALER, APP_TIMER_OP_QUEUE_SIZE, true);
}
/**@brief Function for initializing the button module.
*/
static void buttons_init(void)
{
nrf_gpio_cfg_sense_input(BOOTLOADER_BUTTON,
NRF_GPIO_PIN_PULLUP,
NRF_GPIO_PIN_SENSE_LOW);
}
/**@brief Function for dispatching a BLE stack event to all modules with a BLE stack event handler.
*
* @details This function is called from the scheduler in the main loop after a BLE stack
* event has been received.
*
* @param[in] p_ble_evt Bluetooth stack event.
*/
static void sys_evt_dispatch(uint32_t event)
{
pstorage_sys_event_handler(event);
}
/**@brief Function for initializing the BLE stack.
*
* @details Initializes the SoftDevice and the BLE event interrupt.
*
* @param[in] init_softdevice true if SoftDevice should be initialized. The SoftDevice must only
* be initialized if a chip reset has occured. Soft reset from
* application must not reinitialize the SoftDevice.
*/
static void ble_stack_init(bool init_softdevice)
{
uint32_t err_code;
sd_mbr_command_t com = {SD_MBR_COMMAND_INIT_SD, };
nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
if (init_softdevice)
{
err_code = sd_mbr_command(&com);
APP_ERROR_CHECK(err_code);
}
err_code = sd_softdevice_vector_table_base_set(BOOTLOADER_REGION_START);
APP_ERROR_CHECK(err_code);
SOFTDEVICE_HANDLER_APPSH_INIT(&clock_lf_cfg, true);
// Enable BLE stack.
ble_enable_params_t ble_enable_params;
// Only one connection as a central is used when performing dfu.
err_code = softdevice_enable_get_default_config(1, 1, &ble_enable_params);
APP_ERROR_CHECK(err_code);
ble_enable_params.gatts_enable_params.service_changed = IS_SRVC_CHANGED_CHARACT_PRESENT;
err_code = softdevice_enable(&ble_enable_params);
APP_ERROR_CHECK(err_code);
err_code = softdevice_sys_evt_handler_set(sys_evt_dispatch);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for event scheduler initialization.
*/
static void scheduler_init(void)
{
APP_SCHED_INIT(SCHED_MAX_EVENT_DATA_SIZE, SCHED_QUEUE_SIZE);
}
static int ledCounter = 0;
#define LED_COUNTER_TIMEOUT 1000 // 1ms
#define NUM_COUNTS 7
#define PAUSE_TIME 10000
const int countTops[NUM_COUNTS] = {10000, 5000, 3750, 2500, 1875, 1250, 1000};
const int countRepeats[NUM_COUNTS] = {1, 2, 3, 4, 5, 8, 10};
int countPosition = 0;
int repeatCounter = 0;
bool pauseBlink = 0;
void simple_timeout_handler(void * p_context)
{
if (!pauseBlink)
{
if (++ledCounter >= countTops[countPosition])
{
ledCounter = 0;
nrf_gpio_pin_toggle(UPDATE_IN_PROGRESS_LED);
if (++repeatCounter >= countRepeats[countPosition])
{
repeatCounter = 0;
countPosition += 1;
if (countPosition >= NUM_COUNTS)
{
nrf_gpio_pin_clear(UPDATE_IN_PROGRESS_LED);
pauseBlink = 1;
countPosition = 0;
}
}
}
}
else
{
if (++ledCounter >= PAUSE_TIME)
{
ledCounter = 0;
pauseBlink = 0;
}
}
}
/**@brief Function for bootloader main entry.
*/
int main(void)
{
uint32_t err_code;
bool dfu_start = false;
bool app_reset = (NRF_POWER->GPREGRET == BOOTLOADER_DFU_START);
if (app_reset)
{
NRF_POWER->GPREGRET = 0;
}
leds_init();
// This check ensures that the defined fields in the bootloader corresponds with actual
// setting in the chip.
APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
APP_ERROR_CHECK_BOOL(NRF_FICR->CODEPAGESIZE == CODE_PAGE_SIZE);
// Initialize.
timers_init();
buttons_init();
(void)bootloader_init();
nrf_gpio_pin_clear(UPDATE_IN_PROGRESS_LED);
//!
app_simple_timer_init();
app_simple_timer_start(APP_SIMPLE_TIMER_MODE_REPEATED, simple_timeout_handler, LED_COUNTER_TIMEOUT, NULL);
//!
if (bootloader_dfu_sd_in_progress())
{
//nrf_gpio_pin_set(UPDATE_IN_PROGRESS_LED);
err_code = bootloader_dfu_sd_update_continue();
APP_ERROR_CHECK(err_code);
ble_stack_init(!app_reset);
scheduler_init();
err_code = bootloader_dfu_sd_update_finalize();
APP_ERROR_CHECK(err_code);
//nrf_gpio_pin_clear(UPDATE_IN_PROGRESS_LED);
}
else
{
// If stack is present then continue initialization of bootloader.
ble_stack_init(!app_reset);
scheduler_init();
}
dfu_start = app_reset;
dfu_start |= ((nrf_gpio_pin_read(BOOTLOADER_BUTTON) == 0) ? true: false);
//if (dfu_start)nrf_gpio_pin_set(UPDATE_IN_PROGRESS_LED);
if (dfu_start || (!bootloader_app_is_valid(DFU_BANK_0_REGION_START)))
{
//nrf_gpio_pin_set(UPDATE_IN_PROGRESS_LED);
// Initiate an update of the firmware.
err_code = bootloader_dfu_start();
APP_ERROR_CHECK(err_code);
//nrf_gpio_pin_clear(UPDATE_IN_PROGRESS_LED);
}
if (bootloader_app_is_valid(DFU_BANK_0_REGION_START) && !bootloader_dfu_sd_in_progress())
{
//nrf_gpio_pin_set(UPDATE_IN_PROGRESS_LED);
// Select a bank region to use as application region.
// @note: Only applications running from DFU_BANK_0_REGION_START is supported.
bootloader_app_start(DFU_BANK_0_REGION_START);
}
//NVIC_SystemReset();
//nrf_gpio_pin_set(UPDATE_IN_PROGRESS_LED);
}
/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef CUSTOM_BOARD_H
#define CUSTOM_BOARD_H
// LED definitions for SparkFun nRF52832 Breakout
#define LEDS_NUMBER 4
#define LED_START 22
#define LED_1 22
#define LED_2 22
#define LED_3 22
#define LED_4 22
#define LED_STOP 22
#define LEDS_LIST { LED_1, LED_2 , LED_3, LED_4}
#define BSP_LED_0 LED_1
#define BSP_LED_1 LED_2
#define BSP_LED_2 LED_3
#define BSP_LED_3 LED_4
#define BSP_LED_0_MASK (1<<BSP_LED_0)
#define BSP_LED_1_MASK (1<<BSP_LED_1)
#define BSP_LED_2_MASK (1<<BSP_LED_2)
#define BSP_LED_3_MASK (1<<BSP_LED_3)
#define LEDS_MASK (BSP_LED_0_MASK | BSP_LED_1_MASK | BSP_LED_2_MASK | BSP_LED_3_MASK)
/* all LEDs are lit when GPIO is low */
#define LEDS_INV_MASK LEDS_MASK
// Button definitions for SparkFun nRF52832 Breakout
#define BUTTONS_NUMBER 1
#define BUTTON_START 6
#define BUTTON_1 6
#define BUTTON_STOP 6
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
#define BUTTONS_LIST { BUTTON_1 }
#define BSP_BUTTON_0 BUTTON_1
#define BSP_BUTTON_0_MASK (1<<BSP_BUTTON_0)
#define BUTTONS_MASK 0x00000040
#define RX_PIN_NUMBER 26
#define TX_PIN_NUMBER 27
#define CTS_PIN_NUMBER 24
#define RTS_PIN_NUMBER 25
#define HWFC false
/*#define SPIS_MISO_PIN 28 // SPI MISO signal.
#define SPIS_CSN_PIN 12 // SPI CSN signal.
#define SPIS_MOSI_PIN 25 // SPI MOSI signal.
#define SPIS_SCK_PIN 29 // SPI SCK signal.
#define SPIM0_SCK_PIN 29 // SPI clock GPIO pin number.
#define SPIM0_MOSI_PIN 25 // SPI Master Out Slave In GPIO pin number.
#define SPIM0_MISO_PIN 28 // SPI Master In Slave Out GPIO pin number.
#define SPIM0_SS_PIN 12 // SPI Slave Select GPIO pin number.
#define SPIM1_SCK_PIN 2 // SPI clock GPIO pin number.
#define SPIM1_MOSI_PIN 3 // SPI Master Out Slave In GPIO pin number.
#define SPIM1_MISO_PIN 4 // SPI Master In Slave Out GPIO pin number.
#define SPIM1_SS_PIN 5 // SPI Slave Select GPIO pin number.
#define SPIM2_SCK_PIN 12 // SPI clock GPIO pin number.
#define SPIM2_MOSI_PIN 13 // SPI Master Out Slave In GPIO pin number.
#define SPIM2_MISO_PIN 14 // SPI Master In Slave Out GPIO pin number.
#define SPIM2_SS_PIN 15 // SPI Slave Select GPIO pin number.
// serialization APPLICATION board - temp. setup for running serialized MEMU tests
#define SER_APP_RX_PIN 23 // UART RX pin number.
#define SER_APP_TX_PIN 24 // UART TX pin number.
#define SER_APP_CTS_PIN 2 // UART Clear To Send pin number.
#define SER_APP_RTS_PIN 25 // UART Request To Send pin number.
#define SER_APP_SPIM0_SCK_PIN 27 // SPI clock GPIO pin number.
#define SER_APP_SPIM0_MOSI_PIN 2 // SPI Master Out Slave In GPIO pin number
#define SER_APP_SPIM0_MISO_PIN 26 // SPI Master In Slave Out GPIO pin number
#define SER_APP_SPIM0_SS_PIN 23 // SPI Slave Select GPIO pin number
#define SER_APP_SPIM0_RDY_PIN 25 // SPI READY GPIO pin number
#define SER_APP_SPIM0_REQ_PIN 24 // SPI REQUEST GPIO pin number
// serialization CONNECTIVITY board
#define SER_CON_RX_PIN 24 // UART RX pin number.
#define SER_CON_TX_PIN 23 // UART TX pin number.
#define SER_CON_CTS_PIN 25 // UART Clear To Send pin number. Not used if HWFC is set to false.
#define SER_CON_RTS_PIN 2 // UART Request To Send pin number. Not used if HWFC is set to false.
#define SER_CON_SPIS_SCK_PIN 27 // SPI SCK signal.
#define SER_CON_SPIS_MOSI_PIN 2 // SPI MOSI signal.
#define SER_CON_SPIS_MISO_PIN 26 // SPI MISO signal.
#define SER_CON_SPIS_CSN_PIN 23 // SPI CSN signal.
#define SER_CON_SPIS_RDY_PIN 25 // SPI READY GPIO pin number.
#define SER_CON_SPIS_REQ_PIN 24 // SPI REQUEST GPIO pin number.
*/
#define SER_CONN_CHIP_RESET_PIN 11 // Pin used to reset connectivity chip
/*
// Arduino board mappings
#define ARDUINO_SCL_PIN 27 // SCL signal pin
#define ARDUINO_SDA_PIN 26 // SDA signal pin
#define ARDUINO_AREF_PIN 2 // Aref pin
#define ARDUINO_13_PIN 25 // Digital pin 13
#define ARDUINO_12_PIN 24 // Digital pin 12
#define ARDUINO_11_PIN 23 // Digital pin 11
#define ARDUINO_10_PIN 22 // Digital pin 10
#define ARDUINO_9_PIN 20 // Digital pin 9
#define ARDUINO_8_PIN 19 // Digital pin 8
#define ARDUINO_7_PIN 18 // Digital pin 7
#define ARDUINO_6_PIN 17 // Digital pin 6
#define ARDUINO_5_PIN 16 // Digital pin 5
#define ARDUINO_4_PIN 15 // Digital pin 4
#define ARDUINO_3_PIN 14 // Digital pin 3
#define ARDUINO_2_PIN 13 // Digital pin 2
#define ARDUINO_1_PIN 12 // Digital pin 1
#define ARDUINO_0_PIN 11 // Digital pin 0
#define ARDUINO_A0_PIN 3 // Analog channel 0
#define ARDUINO_A1_PIN 4 // Analog channel 1
#define ARDUINO_A2_PIN 28 // Analog channel 2
#define ARDUINO_A3_PIN 29 // Analog channel 3
#define ARDUINO_A4_PIN 30 // Analog channel 4
#define ARDUINO_A5_PIN 31 // Analog channel 5
*/
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#endif // PCA10040_H
/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @cond To make doxygen skip this file */
/** @file
* This header contains defines with respect persistent storage that are specific to
* persistent storage implementation and application use case.
*/
#ifndef PSTORAGE_PL_H__
#define PSTORAGE_PL_H__
#include <stdint.h>
#include "nrf.h"
static __INLINE uint16_t pstorage_flash_page_size()
{
return (uint16_t)NRF_FICR->CODEPAGESIZE;
}
#define PSTORAGE_FLASH_PAGE_SIZE pstorage_flash_page_size() /**< Size of one flash page. */
#define PSTORAGE_FLASH_EMPTY_MASK 0xFFFFFFFF /**< Bit mask that defines an empty address in flash. */
static __INLINE uint32_t pstorage_flash_page_end()
{
uint32_t bootloader_addr = NRF_UICR->NRFFW[0];
return ((bootloader_addr != PSTORAGE_FLASH_EMPTY_MASK) ?
(bootloader_addr/ PSTORAGE_FLASH_PAGE_SIZE) : NRF_FICR->CODESIZE);
}
#define PSTORAGE_FLASH_PAGE_END pstorage_flash_page_end()
#define PSTORAGE_NUM_OF_PAGES 3 /**< Number of flash pages allocated for the pstorage module excluding the swap page, configurable based on system requirements. */
#define PSTORAGE_MIN_BLOCK_SIZE 0x0010 /**< Minimum size of block that can be registered with the module. Should be configured based on system requirements, recommendation is not have this value to be at least size of word. */
#define PSTORAGE_DATA_START_ADDR ((PSTORAGE_FLASH_PAGE_END - PSTORAGE_NUM_OF_PAGES) \
* PSTORAGE_FLASH_PAGE_SIZE) /**< Start address for persistent data, configurable according to system requirements. */
#define PSTORAGE_DATA_END_ADDR (PSTORAGE_FLASH_PAGE_END * PSTORAGE_FLASH_PAGE_SIZE) /**< End address for persistent data, configurable according to system requirements. */
#define PSTORAGE_SWAP_ADDR PSTORAGE_DATA_END_ADDR
#define PSTORAGE_MAX_BLOCK_SIZE PSTORAGE_FLASH_PAGE_SIZE /**< Maximum size of block that can be registered with the module. Should be configured based on system requirements. And should be greater than or equal to the minimum size. */
#define PSTORAGE_CMD_QUEUE_SIZE 10 /**< Maximum number of flash access commands that can be maintained by the module for all applications. Configurable. */
/**@breif Define this flag in case Raw access to persistent memory is to be enabled. Raw mode
* unlike the data mode is for uses other than storing data from various mode. This mode is
* employed when unpdating firmware or similar uses. Therefore, this mode shall be enabled
* only for these special usecases and typically disabled.
*/
#define PSTORAGE_RAW_MODE_ENABLE
/** Abstracts persistently memory block identifier. */
typedef uint32_t pstorage_block_t;
typedef struct
{
uint32_t module_id; /**< Module ID.*/
pstorage_block_t block_id; /**< Block ID.*/
} pstorage_handle_t;
typedef uint32_t pstorage_size_t; /** Size of length and offset fields. */
/**@brief Handles Flash Access Result Events. To be called in the system event dispatcher of the application. */
void pstorage_sys_event_handler (uint32_t sys_evt);
#endif // PSTORAGE_PL_H__
/** @} */
/** @endcond */
/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef NRF_DRV_CONFIG_H
#define NRF_DRV_CONFIG_H
/**
* Provide a non-zero value here in applications that need to use several
* peripherals with the same ID that are sharing certain resources
* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
* simultaneously. Therefore, this definition allows to initialize the driver
* for another peripheral from a given group only after the previously used one
* is uninitialized. Normally, this is not possible, because interrupt handlers
* are implemented in individual drivers.
* This functionality requires a more complicated interrupt handling and driver
* initialization, hence it is not always desirable to use it.
*/
#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
/* CLOCK */
#define CLOCK_ENABLED 0
#if (CLOCK_ENABLED == 1)
#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LFCLK_Xtal
#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* GPIOTE */
#define GPIOTE_ENABLED 0
#if (GPIOTE_ENABLED == 1)
#define GPIOTE_CONFIG_USE_SWI_EGU false
#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
#endif
/* TIMER */
#define TIMER0_ENABLED 0
#if (TIMER0_ENABLED == 1)
#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER0_INSTANCE_INDEX 0
#endif
#define TIMER1_ENABLED 1
#if (TIMER1_ENABLED == 1)
#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
#endif
#define TIMER2_ENABLED 0
#if (TIMER2_ENABLED == 1)
#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER3_ENABLED 0
#if (TIMER3_ENABLED == 1)
#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER4_ENABLED 0
#if (TIMER4_ENABLED == 1)
#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
/* RTC */
#define RTC0_ENABLED 0
#if (RTC0_ENABLED == 1)
#define RTC0_CONFIG_FREQUENCY 32678
#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC0_CONFIG_RELIABLE false
#define RTC0_INSTANCE_INDEX 0
#endif
#define RTC1_ENABLED 0
#if (RTC1_ENABLED == 1)
#define RTC1_CONFIG_FREQUENCY 32768
#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC1_CONFIG_RELIABLE false
#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
#endif
#define RTC2_ENABLED 0
#if (RTC2_ENABLED == 1)
#define RTC2_CONFIG_FREQUENCY 32768
#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC2_CONFIG_RELIABLE false
#define RTC2_INSTANCE_INDEX (RTC0_ENABLED+RTC1_ENABLED)
#endif
#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
#define NRF_MAXIMUM_LATENCY_US 2000
/* RNG */
#define RNG_ENABLED 0
#if (RNG_ENABLED == 1)
#define RNG_CONFIG_ERROR_CORRECTION true
#define RNG_CONFIG_POOL_SIZE 8
#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* PWM */
#define PWM0_ENABLED 0
#if (PWM0_ENABLED == 1)
#define PWM0_CONFIG_OUT0_PIN 2
#define PWM0_CONFIG_OUT1_PIN 3
#define PWM0_CONFIG_OUT2_PIN 4
#define PWM0_CONFIG_OUT3_PIN 5
#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM0_CONFIG_TOP_VALUE 1000
#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM0_INSTANCE_INDEX 0
#endif
#define PWM1_ENABLED 0
#if (PWM1_ENABLED == 1)
#define PWM1_CONFIG_OUT0_PIN 2
#define PWM1_CONFIG_OUT1_PIN 3
#define PWM1_CONFIG_OUT2_PIN 4
#define PWM1_CONFIG_OUT3_PIN 5
#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM1_CONFIG_TOP_VALUE 1000
#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
#endif
#define PWM2_ENABLED 0
#if (PWM2_ENABLED == 1)
#define PWM2_CONFIG_OUT0_PIN 2
#define PWM2_CONFIG_OUT1_PIN 3
#define PWM2_CONFIG_OUT2_PIN 4
#define PWM2_CONFIG_OUT3_PIN 5
#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM2_CONFIG_TOP_VALUE 1000
#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
#endif
#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
/* SPI */
#define SPI0_ENABLED 0
#if (SPI0_ENABLED == 1)
#define SPI0_USE_EASY_DMA 0
#define SPI0_CONFIG_SCK_PIN 2
#define SPI0_CONFIG_MOSI_PIN 3
#define SPI0_CONFIG_MISO_PIN 4
#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI0_INSTANCE_INDEX 0
#endif
#define SPI1_ENABLED 0
#if (SPI1_ENABLED == 1)
#define SPI1_USE_EASY_DMA 0
#define SPI1_CONFIG_SCK_PIN 2
#define SPI1_CONFIG_MOSI_PIN 3
#define SPI1_CONFIG_MISO_PIN 4
#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
#endif
#define SPI2_ENABLED 0
#if (SPI2_ENABLED == 1)
#define SPI2_USE_EASY_DMA 0
#define SPI2_CONFIG_SCK_PIN 2
#define SPI2_CONFIG_MOSI_PIN 3
#define SPI2_CONFIG_MISO_PIN 4
#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
#endif
#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
/* SPIS */
#define SPIS0_ENABLED 0
#if (SPIS0_ENABLED == 1)
#define SPIS0_CONFIG_SCK_PIN 2
#define SPIS0_CONFIG_MOSI_PIN 3
#define SPIS0_CONFIG_MISO_PIN 4
#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS0_INSTANCE_INDEX 0
#endif
#define SPIS1_ENABLED 0
#if (SPIS1_ENABLED == 1)
#define SPIS1_CONFIG_SCK_PIN 2
#define SPIS1_CONFIG_MOSI_PIN 3
#define SPIS1_CONFIG_MISO_PIN 4
#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
#endif
#define SPIS2_ENABLED 0
#if (SPIS2_ENABLED == 1)
#define SPIS2_CONFIG_SCK_PIN 2
#define SPIS2_CONFIG_MOSI_PIN 3
#define SPIS2_CONFIG_MISO_PIN 4
#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
#endif
#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
/* UART */
#define UART0_ENABLED 1
#if (UART0_ENABLED == 1)
#define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED
#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_115200
#define UART0_CONFIG_PSEL_TXD 6
#define UART0_CONFIG_PSEL_RXD 8
#define UART0_CONFIG_PSEL_CTS 7
#define UART0_CONFIG_PSEL_RTS 5
#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#ifdef NRF52
#define UART0_CONFIG_USE_EASY_DMA false
//Compile time flag
#define UART_EASY_DMA_SUPPORT 1
#define UART_LEGACY_SUPPORT 1
#endif //NRF52
#endif
#define TWI0_ENABLED 0
#if (TWI0_ENABLED == 1)
#define TWI0_USE_EASY_DMA 0
#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI0_CONFIG_SCL 0
#define TWI0_CONFIG_SDA 1
#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWI0_INSTANCE_INDEX 0
#endif
#define TWI1_ENABLED 0
#if (TWI1_ENABLED == 1)
#define TWI1_USE_EASY_DMA 0
#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI1_CONFIG_SCL 0
#define TWI1_CONFIG_SDA 1
#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
#endif
#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
/* TWIS */
#define TWIS0_ENABLED 0
#if (TWIS0_ENABLED == 1)
#define TWIS0_CONFIG_ADDR0 0
#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS0_CONFIG_SCL 0
#define TWIS0_CONFIG_SDA 1
#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWIS0_INSTANCE_INDEX 0
#endif
#define TWIS1_ENABLED 0
#if (TWIS1_ENABLED == 1)
#define TWIS1_CONFIG_ADDR0 0
#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS1_CONFIG_SCL 0
#define TWIS1_CONFIG_SDA 1
#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
#endif
#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_NO_SYNC_MODE 0
/* QDEC */
#define QDEC_ENABLED 0
#if (QDEC_ENABLED == 1)
#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
#define QDEC_CONFIG_PIO_A 1
#define QDEC_CONFIG_PIO_B 2
#define QDEC_CONFIG_PIO_LED 3
#define QDEC_CONFIG_LEDPRE 511
#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define QDEC_CONFIG_DBFEN false
#define QDEC_CONFIG_SAMPLE_INTEN false
#endif
/* ADC */
#define ADC_ENABLED 0
#if (ADC_ENABLED == 1)
#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* SAADC */
#define SAADC_ENABLED 0
#if (SAADC_ENABLED == 1)
#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* PDM */
#define PDM_ENABLED 0
#if (PDM_ENABLED == 1)
#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* COMP */
#define COMP_ENABLED 0
#if (COMP_ENABLED == 1)
#define COMP_CONFIG_REF NRF_COMP_REF_Int1V8
#define COMP_CONFIG_MAIN_MODE NRF_COMP_MAIN_MODE_SE
#define COMP_CONFIG_SPEED_MODE NRF_COMP_SP_MODE_High
#define COMP_CONFIG_HYST NRF_COMP_HYST_NoHyst
#define COMP_CONFIG_ISOURCE NRF_COMP_ISOURCE_Off
#define COMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define COMP_CONFIG_INPUT NRF_COMP_INPUT_0
#endif
/* LPCOMP */
#define LPCOMP_ENABLED 0
#if (LPCOMP_ENABLED == 1)
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
#endif
/* WDT */
#define WDT_ENABLED 0
#if (WDT_ENABLED == 1)
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
#define WDT_CONFIG_RELOAD_VALUE 2000
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#endif
/* SWI EGU */
#ifdef NRF52
#define EGU_ENABLED 0
#endif
/* I2S */
#define I2S_ENABLED 0
#if (I2S_ENABLED == 1)
#define I2S_CONFIG_SCK_PIN 22
#define I2S_CONFIG_LRCK_PIN 23
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
#define I2S_CONFIG_SDOUT_PIN 24
#define I2S_CONFIG_SDIN_PIN 25
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
#endif
#include "nrf_drv_config_validation.h"
#endif // NRF_DRV_CONFIG_H
Josue Alejandro
15 projects • 12 followers
In my spare time I like to design electronics, I love product design from start to end. I love photography. I am a Hardware Fan.
Thanks to Sparkfun Electronics and PCBWay.
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