LogicTronix [FPGA Design + Machine Learning Company]

43 Projects 167 Followers 1 Following

This article is on general steps and methods for creating the Vitis AI enablement project with DPU design in 2024.x tool for Kria or MPSoC.

Vitis-AI DPU-TRD for 2024.x with VIVADO and Kria/MPSoC

LogicTronix [FPGA Design + Machine Learning Company]

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Enabling Vitis AI 3.5 and DPU in Petalinux 2024.2 for AI/ML acceleration for Kria/MPSoC/Versal.

Vitis AI 3.5 with Petalinux 2024.2

LogicTronix [FPGA Design + Machine Learning Company]

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This tutorial details the steps needed for building Petalinux 2024.2 with SDT flow.

Kria KR260 Petalinux 2024.2 SDT flow project build

LogicTronix [FPGA Design + Machine Learning Company]

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Creating Vitis custom base platform based on 10G PL Ethernet with 2024.1 tools for AMD Versal VEK280!

Creating VEK280 10G PL Ethernet based Vitis Custom Platform

LogicTronix [FPGA Design + Machine Learning Company]

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The article flow on how to setup interfaces as eMMC/SD in KD240 and custom carrier for K24 SoM.

K24 SoM eMMC/SD Programming with KD240 and Custom Carrier

LogicTronix [FPGA Design + Machine Learning Company]

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We have provided the steps for different booting methods for custom carrier based on Kria K26 SoMs, it can be applied for custom carrier.

K26 SOM with Custom Carrier booting from emmc, SD card & USB

LogicTronix [FPGA Design + Machine Learning Company]

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Bringing up custom carrier for Kria K26 with Petalinux 2024.1 via SD/eMMC. We will be following K26 SoM BSP and create the carrier project.

K26 custom carrier programming with SD/eMMC and Petalinux

LogicTronix [FPGA Design + Machine Learning Company]

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This is explanation tutorial on ADAS detection from Vitis AI Runtime or VART from Vitis AI githb repo.

Vitis AI Runtime (VART) - ADAS Detection Explanation

LogicTronix [FPGA Design + Machine Learning Company]

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