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Tony ZHANG
Published © MIT

FPGA Combination Locker (VHDL) on Nexys4 Board

Use VHDL to implement a simple digital Combination Locker State Machine on the Nexys4 FPGA Board. Designed in Xilinx Vivado.

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FPGA Combination Locker (VHDL) on Nexys4 Board

Things used in this project

Hardware components

Digilent Nexys4 FPGA Board
×1

Story

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Schematics

Github

Code

Github

Credits

Tony ZHANG

Tony ZHANG

16 projects • 120 followers
I'm an Embedded Software Engineer who like DIY electronic. linkedin.com/in/faweiz

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