Pablo Trujillo
Published © CERN-OHL

Custom hardware-in-the-loop platform with Spartan7

HIL devices are excellent for real-time simulations of electronic circuits - in this project I show you how you can create your own!

IntermediateFull instructions provided5 hours464
Custom hardware-in-the-loop platform with Spartan7

Things used in this project

Software apps and online services

KiCad
KiCad

Hand tools and fabrication machines

Soldering iron (generic)
Soldering iron (generic)

Story

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Schematics

Kicad project

Here you will find the KiCad project with all the fabrication files

Code

Constraints

Tcl
Constraints file of the board
## Clock signal
set_property -dict { PACKAGE_PIN G4 IOSTANDARD LVCMOS33 } [get_ports { sys_clk }]; 
create_clock -add -name sys_clk_pin -period 33.33 -waveform {0 5} [get_ports { sys_clk }];

## DIO
set_property -dict { PACKAGE_PIN L1 IOSTANDARD LVCMOS33 } [get_ports { dio[0] }]; 
set_property -dict { PACKAGE_PIN L2 IOSTANDARD LVCMOS33 } [get_ports { dio[1] }]; 
set_property -dict { PACKAGE_PIN M1 IOSTANDARD LVCMOS33 } [get_ports { dio[2] }]; 
set_property -dict { PACKAGE_PIN M2 IOSTANDARD LVCMOS33 } [get_ports { dio[3] }]; 
set_property -dict { PACKAGE_PIN N1 IOSTANDARD LVCMOS33 } [get_ports { dio[4] }]; 
set_property -dict { PACKAGE_PIN P2 IOSTANDARD LVCMOS33 } [get_ports { dio[5] }]; 
set_property -dict { PACKAGE_PIN P3 IOSTANDARD LVCMOS33 } [get_ports { dio[6] }]; 

## PWM
set_property -dict { PACKAGE_PIN A2 IOSTANDARD LVCMOS33 } [get_ports { pwm[0] }]; 
set_property -dict { PACKAGE_PIN B3 IOSTANDARD LVCMOS33 } [get_ports { pwm[1] }]; 
set_property -dict { PACKAGE_PIN A4 IOSTANDARD LVCMOS33 } [get_ports { pwm[2] }]; 
set_property -dict { PACKAGE_PIN A5 IOSTANDARD LVCMOS33 } [get_ports { pwm[3] }]; 
set_property -dict { PACKAGE_PIN B5 IOSTANDARD LVCMOS33 } [get_ports { pwm[4] }]; 
set_property -dict { PACKAGE_PIN B6 IOSTANDARD LVCMOS33 } [get_ports { pwm[5] }]; 
set_property -dict { PACKAGE_PIN D2 IOSTANDARD LVCMOS33 } [get_ports { pwm[6] }]; 
set_property -dict { PACKAGE_PIN D1 IOSTANDARD LVCMOS33 } [get_ports { pwm[7] }]; 
set_property -dict { PACKAGE_PIN C3 IOSTANDARD LVCMOS33 } [get_ports { pwm[8] }]; 
set_property -dict { PACKAGE_PIN C1 IOSTANDARD LVCMOS33 } [get_ports { pwm[9] }]; 
set_property -dict { PACKAGE_PIN B2 IOSTANDARD LVCMOS33 } [get_ports { pwm[10] }]; 
set_property -dict { PACKAGE_PIN B1 IOSTANDARD LVCMOS33 } [get_ports { pwm[11] }]; 

## DAC0
set_property -dict { PACKAGE_PIN D13 IOSTANDARD LVCMOS33 } [get_ports { dac0_din }]; 
set_property -dict { PACKAGE_PIN F14 IOSTANDARD LVCMOS33 } [get_ports { dac0_ldac }]; 
set_property -dict { PACKAGE_PIN E13 IOSTANDARD LVCMOS33 } [get_ports { dac0_sync }]; 
set_property -dict { PACKAGE_PIN D14 IOSTANDARD LVCMOS33 } [get_ports { dac0_sclk }]; 

## DAC1
set_property -dict { PACKAGE_PIN J14 IOSTANDARD LVCMOS33 } [get_ports { dac1_din }]; 
set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { dac1_ldac }]; 
set_property -dict { PACKAGE_PIN J13 IOSTANDARD LVCMOS33 } [get_ports { dac1_sync }]; 
set_property -dict { PACKAGE_PIN H13 IOSTANDARD LVCMOS33 } [get_ports { dac1_sclk }]; 

## RP2040
set_property -dict { PACKAGE_PIN H1 IOSTANDARD LVCMOS33 } [get_ports { rp2040_uart_tx }]; 
set_property -dict { PACKAGE_PIN G1 IOSTANDARD LVCMOS33 } [get_ports { rp2040_uart_rx }]; 

## LEDs
set_property -dict { PACKAGE_PIN P12 IOSTANDARD LVCMOS33 } [get_ports { model_running_led }]; 
set_property -dict { PACKAGE_PIN P13 IOSTANDARD LVCMOS33 } [get_ports { comm_led }]; 

Credits

Pablo Trujillo
15 projects • 166 followers
FPGA designer for power electronics equipment. DSP and Power Electronics Control design specialist.
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