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Whitney Knitter
Published © GPL3+

Interfacing with AXI Peripherals in RTL

This project demonstrates how to interface with an AXI GPIO peripheral located in RTL vs in the block design in Vivado v2021.2

AdvancedProtip2 hours4,502
Interfacing with AXI Peripherals in RTL

Things used in this project

Hardware components

Arty Z7-20
Digilent Arty Z7-20
×1
USB-A to Micro-USB Cable
USB-A to Micro-USB Cable
×1

Software apps and online services

Vivado Design Suite
AMD Vivado Design Suite
Vitis Unified Software Platform
AMD Vitis Unified Software Platform

Story

Read more

Schematics

Arty Z7 Schematic

Code

C Application Source Code

C/C++
No preview (download only).

Credits

Whitney Knitter
172 projects • 1799 followers
All thoughts/opinions are my own and do not reflect those of any company/entity I currently/previously associate with.
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