The FPGA in the Kria KV260 board can be used to accelerate various software algorithms. The AMD-Xilinx Vitis toolset can be used to develop such an accelerator. However, a Kria KV260 Vitis platform should be provided to be used in the Vitis toolset. This platform encapsulates the underlying hardware and software components implementing accelerators. I will explain how to prepare such a platform using Vivado, PetaLinux and Vitis 2022.1.
This project was originally posted here by the author.
The platform preparation process consists of four steps:
1- Providing hardware components2- Generating software components3- Integrating hardware/software components in a Vitis platform4- Testing the generated platform
Before starting the platform creation steps, go to the AMD Xilinx download page and install Vitis and Petalinux 2022.1 on a Linux OS.
You also need the sd-card created in the first part of this blog series.
Then you should provide the following folder hierarchy.
We need to create a Vivado project to design the hardware components for the Kria Vitis platform. For this purpose, the following steps should be performed.
1-1- Run vivado 2022.1 software and create a Vivado project with the name of kv260_vitis_platform_20221 in the hardware folder.
1-2- In the “Project Type” page, make sure to select “RTL Project“, “Do not specify sources at this time“, and “Project is an extensible Vitis platform“.
1-3- in the “Default Part” page, select the “Kria KV260 Vision AI Starter Kit” board as the underlying target FPGA platform.
1-4– Select the Kria KV260 Vision board as the underlying FPGA platform on the Default Part page.
1-5- Click on the plus sign inside the Diagram view and look for Zynq UltraScale+ MPSoC IP. Then add that to the design area.
1-6- Click on the “Run Block Automation” link on top of the Diagram area. Ensure that the “Apply Board Preset” option is selected and press OK.
1-7- Add a “Clocking Wizard” IP to the design, double click on the added IP, and configure that, as shown in the following figure.
–clk_out1 100 MHz–clk_out2 200 MHz–clk_out3 400 MHz— Reset Type: Active Low
1-8- Add three “Processor System Reset” IPs to the design and connect them to other IPs, as shown in the following figure.
1-9- Double click on the Zynq IP, disable AXI HPM0 and AXI HPM1 interfaces and enable the AXI HPM0 LPD interface, as shown in the following figure.
1-10- Add an “AXI Interrupt Controller” IP to the design, double click on the added IP and change the “Interrupt Output Connection” option to Single.
1-11- Click on the “Run Connection Automation” link and select the 200MHz clock for the Clock source for Slave and Master interfaces.
1-12- Connect the irq pin on the interrupt controller IP to the pl_ps_irq pin on the Zynq IP.
1-13- The following figure shows the final design connectivities.
1-14- Click on the “Platform Setup” tab, then select the Clock option from the settings section. Enable clk_ou1, clk_ou2, and clk_ou3. Change the clock ID to start from zero. Select the clk_out2 as the default.
1-15- Click on the “interrupt” option in the “Platform Setup” tab, then enable intr as shown in the following figure.
1-16- Select the “AXI Port” option, then enable ports as shown in the following figure. Don’t forget to assign the proper SP Tag to AXI_HPC0, AXI_HPC1, AXI_HP0, AXI_HP1, AXI_HP2, and AXI_HP3.
1-17- Also enable M01_AXI to M07_AXI ports.
1-18- Right-click on the “design_1” under the “Design Sources” option in the “Sources” tab, then click on “Create HDL Wrapper…”. Select the ” Let Vivado manage wrapper and auto-update” option and click OK.
1-19- You will receive the following critical message; just ignore that.
1-20- Right-click on the design_1 again and select “Generate Output Products”.
1-21- On the “Generate Output Products” page, select the “Out of context per IP” option and click on Generate.
1-22- Click on the Generate Bitstream under the PROGRAM AND DEBUG in the Flow Navigator pane.
1-23- To generate the hardware platform click on File->Export->Export Platform.
1-24- Follow the export wizard pages as follows.
1-25- After finishing this process, you should see the “kv260_vitis_platform_20221.xsa” in the vivado project folder. This file will be used to prepare the software components in the next step.
In this step, we use the AMD-Xilinx Petalinux toolset to configure a version of the Linux file system for the Kria KV260 Vitis platform. Before starting this step, do not forget to run the following command to add the Petalinux toolset path and settings to the environment.
source /tools/Xilinx/PetaLinux/2022.1/settings.sh
Also if you haven’t upgrade the PetaLinux eSDK run this command
petalinux-upgrade -u 'http://petalinux.xilinx.com/sswreleases/rel-v2022/sdkupdate/' -p 'aarch64'
2-1– Download the xilinx-kv260-starterkit-v2022.1-05140151.bsp file in the AMD-Xilinx download webpage. Then run the following command.
petalinux-create --type project -s xilinx-kv260-starterkit-v2022.1-05140151.bsp
2-2– Go to the created PetaLinux project folder
cd xilinx-kv260-starterkit-2022.1/
then run this command
petalinux-config --get-hw-description=../../hardware/kv260_vitis_platform_20221/ --silent
2-3– Now we should add xrt lib into the PetaLinux OS. for this purpose, run this command
petalinux-config -c rootfs
Then go to Filesystem Packages->libs->xrt and enable xrt. After that, click on Exit and press Save to save the configuration.
2-4– Now, you should build the OS by running this command. Depending on your system, it may take 20 to 60 minutes to finish.
petalinux-build
2-5– Now run the following command to generate SDK. It may take 20 to 60 minutes to finish, depending on your system.
petalinux-build --sdk
2-6– Go to the image/linux path inside the PetaLinux project.
cd images/linux/
Then run this command to extract the SDK in a folder. Determine the linux_files folder created earlier as the target folder.
./sdk.sh -d ../../../linux_files/
2-7– Now we can copy zynqmp_fsbl.elf, pmufw.elf, bl31.elf, u-boot.elf, and system.dtb into the boot folder in the folder hierarchy. Change the name of zynqmp_fsbl.elf to fsbl.elf. These files are in the image/linux folder inside the PetaLinux project directory. These files will not be used in the KV260 board. However, we copy that for ease in compiling applications using Vitis.
Then copy rootfs.ext4 into the image path inside the folder hierarchy.
cp rootfs.ext4 ../../../linux_files/image/
Finally, copy boot.scr, Image and system.dtb into the sd_dir path in the folder hierarchy.
cp boot.scr Image system.dtb ../../../linux_files/sd_dir/
2-8– Connect the sd-card to the computer. Do not change the boot partition. Remove the files from the root partition. And then extract the rootfs.tar.gz file into the root partition. Then run the sync command and wait for its finish.
sudo rm -rf /media/numvar/root/*
sudo tar -zxf rootfs.tar.gz -C /media/numvar/root/
sync
2-9– Before creating the Vitis platform, we should generate the device tree overlay that will be used to load applications at run-time. For this purpose, go to the linux_files folder and run the xsct command. Then run the following command.
createdts -hw ../../hardware/kv260_vitis_platform_20221/kv260_vitis_platform_20221.xsa -zocl -platform-name mydevice -git-branch xlnx_rel_v2022.1 -out ./kv260_dto -overlay -compile
Run exit command inside the xsct shell to terminate the shell. Now go to the following folder inside the linux_files
cd kv260_dto/kv260_dto/mydevice/psu_cortexa53_0/device_tree_domain/bsp
and run thid command to generate the device tree overlay.
dtc -@ -O dtb -o pl.dtbo pl.dtsi
We will use teh generated pl.dtbo file later when we run our application on the actual board. So copy that to the linux_files folder to be accessed easily.
3- Vitis platform3-1– Go to the platform directory in the folder hierarchy and open the Vitis toolset. Choose the platform folder as the workspace.
3-2– Create a platform project
3-3– Name the project as kv260_vitis_platform_20221
3-4– Click the Browse button next to the XSA File edit box, then select the kv260_vitis_platform_20221.xsa file in the vivado project inside the hardware folder.
3-5– Choose Linux as the operating system and uncheck the Generate boot components option.
3-6– Click on the down arrow next to the Browse icon of the Bif File box, edit and choose Generate Bif.
3-7– Set Boot Components Directory with boot folder. Set Linux Rootfs with the rootfs.ext4 file in the image folder. Set FAT32 Partition Directory with sd_dir folder. Set Sysroot Directory to the …sysroots/cortex72-xilinx-linux.
3-8– Right-click on the project folder and choose Build Project. The KV260 Vitis platform will be generated in the export folder under the Vitis platform project.
Testing the platform consists of two phases. First, we should write an application and then move the compiled application to the actual board and run that.
4-1 Open the Vitis software and choose the application folder as the workspace. Then create a new application project. On the Platform page, click on the +Add icon. Then go to the export folder under the generated KV260 Vitis platform folder and press Open. Then select the kv260_vitis_platform_20221 platform from the list of platforms.
4-2– Name the application vector_addition and press Next twice. Choose the Simple Vector Addition app on the Templates page. Then press Finish.
4-3– Then change the Active build configuration” option to Hardware. After that, right-click on the top project folder under the explorer view and choose Build Project. It takes 20 to 40 minutes to compile the project and generate the output files.
4-4– Now, we should copy the generated files into the actual board and run the application. Boot the KV260 board with the modified sd-card.
On your computer create a text file with the name shell.json and the following context
{
"shell_type" : "XRT_FLAT",
"num_slots": "1"
}
Transfer the file to the petalinux user home folder.
scp shell.json petalinux@192.168.1.206:~/
4-5– Then transfer pl.dtbo, generated earlier, to the petalinux user home folder.
scp pl.dtbo petalinux@192.168.1.206:~/
You should also copy binary_container_1.xclbin and vector_addition to the petalinux user home folder.
you can find these files in the ….application/vector_addition_system/Hardware/package/sd_card folder.
scp pl.dtbo binary_container_1.xclbin vector_addition petalinux@192.168.1.206:~/
4-6 Then connect to the board using a serial terminal. Then create a folder with the name vector_addition in the /lib/firmware/xilinx folder.
sudo mkdir /lib/firmware/xilinx/vector_addition
Move pl.dtbo and shell.json to the created file.
sudo cp shell.json pl.dtbo /lib/firmware/xilinx/vector_addition
Copy binary_container_1.xclbin file into /lib/firmware/xilinx/vector_addition folder and change its name to kv260_vitis_platform_20221.bit.bin
sudo cp binary_container_1.xclbin /lib/firmware/xilinx/vector_addition/kv260_vitis_platform_20221.bit.bin
4-7– To run the application, do the following commands while you are in the petalinux home folder.
sudo xmutil listapps
sudo xmutil unloadapp
sudo xmutil loadapp vector_addition
./vector_addition binary_container_1.xclbin
You shoudl see the "TEST PASSED" message.
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