This project walks through how to setup the Vivado & Vitis projects for debugging using integrated logic analyzers in HDL in verison 2023.2.
The office cafe’s stamp cards are easy to lose. This tracks purchases by work ID badge so I don’t miss out on my free coffee anymore!
This project is part of a subproject for the AMD Pervasive AI Developer Contest. We are conducting tests with DPU-PYNQ on KR260.
Control short animations of different emojis over VGA (480p) using UART and a ZYNQ board!
This project walks through testing FIR filters with real world signals generated by Digilent's AWG Zmod & captured with the Digitizer Zmod.
0 to 999 (3 digit) counter is implemented on 3 single digit 7 segment display (Common anode type) with FPGA on hardware.
This project walks through how to get started with the Ettus USRP b205mini on Mac OS 14.
This project explains how to connect Velodyne VLP16 Lidar to the Kria Autonomous Robotic Platform (Karp).
Have you ever wanted to think less and have your world be more efficient?! New security system with speech recognition through PYNQ!
See how to install Edge Impulse's C SDK in an embedded Linux image to use their ingestion service for sending data to and from EI Studio.
Utilize KV260's hardware acceleration to perform reliable human position estimation
This project is a demo of a very simplified 2FSK baseband transmitter implemented on the Eclypse Z7 with AWG Zmod.
This project walks through how to create an embedded Linux image for the ARM-core in the Zynq-7000 using PetaLinux 2024.1
This project walks through how to update the referenced hardware XSA file for an accelerated app in Vitis Unified 2023.2
This project walks through how to import a C++ library of an Edge Impulse ML model to develop accelerated applications for AMD FPGAs.
This tutorial is on integrating Raspberry Pi Sense HAT's multiple sensors and LED Matrix display with Kria KR260 in Petalinux 2022.2!
Run a full suite of Vivado on the cloud with just your Chromebook!
This project is part of a subproject for the AMD Pervasive AI Developer Contest. We Implemented DPU, GPIO, and PWM for KR260.
Based on Adam Taylor's - Mini But Mighty, the MiniZed and Vitis for motor control, Bob the Blue Robot Dude dances to MiniZed control.
Using the Zybo Z7, I demonstrate how to access GPIO in Genode and how to load a custom bitstream at boot time.
This project aims to design a simple SOC using the ARM Cortex - M0 design start eval IP.
Demonstration of power-efficient image restoration pipeline based on a VCK5000 that outperforms state of the art computing systems
This project walks through how to set up a base hardware design for the Artix UltraScale+ XEM8320 FPGA development board.
AXI-Lite registers bank. Can be monitored/changed via TCL commands. Also monitored through a seven-segment display + onboard switches.
