Double deep learning CNNs with face and emotion recognition, feeding predictive machine learning, to bring you the optimal caffeine kick.
This tutorial is on Quantizing and Compiling the Ultralytics Yolov5 (Pytorch) with Vitis AI 3.0 and targeted for Kria KV260 FPGA Board.
This project walks details the hardware design in Vivado required to run an embedded Linux image on the Arty A7.
The project walks through how to create a custom hardware project for the Kria KV260 Vision AI Starter Kit in Vivado 2021.1
This project generates and tests a Linux-based hardware platform for Ultra96v2 using the Xilinx Vitis 2020.1.
FPGA-based Binary Neural Network acceleration used for Image Classification on the Avnet Ultra96 based on the Xilinx Zynq UltraScale+ MPSoC.
A summary of how I helped my favorite local coffee shop adapt to the new way of contactless business during COVID-19 using an FPGA.
The ability to process, manipulate and otherwise work with audio signals is a key feature of DSP in FPGA. Here's a look at how we do this!
This project walks through how to create a custom embedded Linux image for the Kria KV260 Vision AI Starter Kit in PetaLinux 2021.1.
See how to generate a custom embedded Linux image for the Arty Z7 using PetaLinux 2020.2.
Use a ZYNQ UltraScale+ to build a distributed camera vision system with image processing capabilities.
This guide provides detailed instructions for implementing face detection on four (4) cameras using the UltraZed-EV and Multi-Camera FMC.
An introduction to the Xilinx direct digital synthesis compiler with simple implementation on the Ultra96 V2.
Process to program Xilinx KRIA K26 production SOM non-volatile memory with Xilinx KRIA KV260 starter kit carrier card
This project shows the step I did to add a USB-WiFi (Realtek 8812BU) adapter to a Kria KV260 running Ubuntu 20.04.3
Setup of the ZCU102 with AD9371 FMC card for SDR applications.
This tutorial will show how to add your own custom IP to SDSoC system and have it integrated with PetaLinux.
This project demonstrates how to build a petalinux image from BSP with DPU support using the vivado flow for KV260.
Zynq is a nifty tool for robotic applications. In this blog, we accelerate image processing using the MT9v034 camera and an Ultra96 board.
Radio that works with analog signal is implemented digitally on FPGA via VHDL.
Creating/packaging custom PL IP, then developing PS software to write/read its memory-mapped registers.
Find the location of a device, using multiple DWM1000-ESP8266 pairs, and an FPGA.
A little guide how to create petalinux project, with PYNQ and XRT support on Minized, with startup scripts.
This project walks through the creation of a custom Vitis platform and an accelerated application for the Kria KR260 Robotics Starter Kit.
