This project demonstrates how to use the DDS & FIR Compiler IPs with the new AMD Kria™ KD240 Drives Starter Kit to drive analog peripherals.
Deploy an AI fire-spotting intelligence accelerated on Xilinx Kria. To augment the firefighting crew to rapidly respond to fire incidents
This project walks through how to create an embedded Linux image for the Arty-Z7 using PetaLinux 2022.1
How to get the PYNQ and Matrix Voice to work with each other.
Deploying a Unet CNN implemented in Tensorflow Keras on Ultra96 V2 (DPU acceleration) using Vitis AI v1.2 and PYNQ v2.6
I installed various EE design applications on the Ubuntu 22.04 desktop image of my KV260 including KiCad, and laid out a custom PCB with it.
This project walks through how to create a basic hardware design for bare metal applications using Vivado 2022.1
Using Vitis for FPGA acceleration, this post in the series for the KV260 covers the final step of creating & testing the Vitis Platform.
2-layer LOW SPEED Lowest cost breakout board for FMC LPC Mezzanine FPGA connectors.
Use high density GIPO FPGA technology to create thousands of GPIO pins on one bus.
3D pose estimation is a challenging task in computer vision but useful in tracking, action understanding, human-robot-interaction, etc
Install the "desktop stretch" on the Ultra96, building and running the DNNDK sample project on Ultra96. Learn about enabling WiFi and VNC.
How to use Xilinx Virtual Cable to debug ILAs in the PL over Ethernet.
Yarn count and grams per square meter determination using a magnified image of fabric and PYNQ computer vision and BNN overlays.
Show how to use Tensil’s open-source accelerator and Xilinx PYNQ to run ResNet-20 model on PYNQ Z1 development board.
Walking through the setup of the SDR Zmod on Eclypse Z7 for SDR development using GNU Radio.
This project walks through how to build & launch a ROS 2 package with KRS on your host PC and on target hardware.
In this project, I show how to connect KV260 using remote desktop
Deploy an object detection model on DPU to build a system which can show detected commodities in VCU decoded video or images from camera.
Allows quick evaluation of Power Supply Plant parameters for TI Buck_VMC_F2837xS project.
This project walks through how to create a custom hardware design in Vivado 2022.1 for the Eclypse Z7 with the new Digitizer Zmod.
Use an Ultra96V2 Board, a Yolov3 neuronal network running on a Xilinx DPU to calculate the perfect pizza cutting angle based on the toppings
This project demonstrates how to stream samples from the ADC on the Zmod Digitizer into the DDR memory of the Eclypse Z7.
Generated RTL code from a C-to-RTL tool is not easy to understand. Here is how to increase design performance without changing any RTL.
